ADC (AL, 0) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	14 00                	adc    al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 2.0
  • Reference cycles: 0.66
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.55
  • UOPS_PORT_1: 0.44
  • UOPS_PORT_5: 0.45
  • UOPS_PORT_6: 0.56
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	14 00                	adc    al,0x0
     2:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.99
  • Reference cycles: 0.82
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 2.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.55
  • UOPS_PORT_1: 0.44
  • UOPS_PORT_5: 0.45
  • UOPS_PORT_6: 0.56
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	14 00                	adc    al,0x0
     2:	90                   	nop
     3:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 2.0
  • Reference cycles: 0.66
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.55
  • UOPS_PORT_1: 0.43
  • UOPS_PORT_5: 0.45
  • UOPS_PORT_6: 0.57
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	14 00                	adc    al,0x0
     2:	90                   	nop
     3:	90                   	nop
     4:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 2.0
  • Reference cycles: 0.65
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.61
  • UOPS_PORT_1: 0.4
  • UOPS_PORT_5: 0.4
  • UOPS_PORT_6: 0.6
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	14 00                	adc    al,0x0
     2:	90                   	nop
     3:	90                   	nop
     4:	90                   	nop
     5:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 2.0
  • Reference cycles: 0.66
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.46
  • UOPS_PORT_1: 0.5
  • UOPS_PORT_5: 0.5
  • UOPS_PORT_6: 0.54
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	14 00                	adc    al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 2.0
  • Reference cycles: 0.66
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.56
  • UOPS_PORT_1: 0.44
  • UOPS_PORT_5: 0.45
  • UOPS_PORT_6: 0.65
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02

With loop_count=1000, unroll_count=10, and padding (redundant prefixes)

• Code:

     0:	40                   	rex
     1:	40                   	rex
     2:	40                   	rex
     3:	40                   	rex
     4:	40                   	rex
     5:	40 14 00             	rex adc al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 2.0
  • Reference cycles: 0.66
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.55
  • UOPS_PORT_1: 0.44
  • UOPS_PORT_5: 0.45
  • UOPS_PORT_6: 0.66
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	14 00                	adc    al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 2.0
  • Reference cycles: 0.66
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 2.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.55
  • UOPS_PORT_1: 0.44
  • UOPS_PORT_5: 0.45
  • UOPS_PORT_6: 0.57
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=100, unroll_count=100, and padding (redundant prefixes)

• Code:

     0:	40                   	rex
     1:	40                   	rex
     2:	40                   	rex
     3:	40                   	rex
     4:	40                   	rex
     5:	40 14 00             	rex adc al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 2.0
  • Reference cycles: 0.66
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.55
  • UOPS_PORT_1: 0.44
  • UOPS_PORT_5: 0.45
  • UOPS_PORT_6: 0.57
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

• Code:

     0:	48 31 c0             	xor    rax,rax
     3:	14 00                	adc    al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.32
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.5
  • UOPS_PORT_1: 0.47
  • UOPS_PORT_5: 0.48
  • UOPS_PORT_6: 0.55
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	48 31 c0             	xor    rax,rax
     3:	14 00                	adc    al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 0.79
  • Reference cycles: 0.29
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 3.1
  • UOPS_MITE: 0.9
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.6
  • UOPS_PORT_1: 0.47
  • UOPS_PORT_5: 0.38
  • UOPS_PORT_6: 0.65
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.29

With loop_count=1000, unroll_count=10, and padding (redundant prefixes)

• Code:

     0:	48 31 c0             	xor    rax,rax
     3:	40                   	rex
     4:	40                   	rex
     5:	40                   	rex
     6:	40                   	rex
     7:	40                   	rex
     8:	40                   	rex
     9:	40                   	rex
     a:	40                   	rex
     b:	40                   	rex
     c:	40                   	rex
     d:	40                   	rex
     e:	40 14 00             	rex adc al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 0.7
  • Reference cycles: 0.23
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 3.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.64
  • UOPS_PORT_1: 0.46
  • UOPS_PORT_5: 0.34
  • UOPS_PORT_6: 0.66
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	48 31 c0             	xor    rax,rax
     3:	14 00                	adc    al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 1.0
  • Reference cycles: 0.33
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 3.01
  • UOPS_MITE: 3.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.53
  • UOPS_PORT_1: 0.45
  • UOPS_PORT_5: 0.45
  • UOPS_PORT_6: 0.58
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=100, unroll_count=100, and padding (redundant prefixes)

• Code:

     0:	48 31 c0             	xor    rax,rax
     3:	40                   	rex
     4:	40                   	rex
     5:	40                   	rex
     6:	40                   	rex
     7:	40                   	rex
     8:	40                   	rex
     9:	40                   	rex
     a:	40                   	rex
     b:	40                   	rex
     c:	40                   	rex
     d:	40                   	rex
     e:	40 14 00             	rex adc al,0x0
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 0.61
  • Reference cycles: 0.2
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 3.01
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.6
  • UOPS_PORT_1: 0.41
  • UOPS_PORT_5: 0.4
  • UOPS_PORT_6: 0.6
  • UOPS_PORT_23: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01