VMASKMOVPD (M256, YMM, YMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.98
  • UOPS_EXECUTED.CORE: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 2.0
  • Reference cycles: 1.99
  • UOPS_EXECUTED.CORE: 4.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.2
  • UOPS_PORT_3: 0.8
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.1
  • Reference cycles: 1.1
  • UOPS_EXECUTED.CORE: 4.1
  • RETIRE_SLOTS: 4.1
  • UOPS_MITE: 4.1
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.6
  • UOPS_PORT_3: 0.4
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With loop_count=1000, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
     c:	0f 1f 84 00 00 00 00 
    13:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 1.3
  • Reference cycles: 1.3
  • UOPS_EXECUTED.CORE: 4.1
  • RETIRE_SLOTS: 5.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.45
  • UOPS_PORT_3: 0.55
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.01
  • Reference cycles: 1.01
  • UOPS_EXECUTED.CORE: 4.01
  • RETIRE_SLOTS: 4.01
  • UOPS_MITE: 4.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.6
  • UOPS_PORT_3: 0.4
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With loop_count=100, unroll_count=100, and padding (long NOPs)

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
     c:	0f 1f 84 00 00 00 00 
    13:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 1.27
  • Reference cycles: 1.27
  • UOPS_EXECUTED.CORE: 4.01
  • RETIRE_SLOTS: 5.01
  • UOPS_MITE: 0.07
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.45
  • UOPS_PORT_3: 0.55
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.03

With unroll_count=200 and no inner loop

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.0
  • Reference cycles: 4.05
  • UOPS_EXECUTED.CORE: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 16.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.0
  • UOPS_PORT_3: 2.0
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.51
  • Reference cycles: 4.51
  • UOPS_EXECUTED.CORE: 16.51
  • RETIRE_SLOTS: 16.5
  • UOPS_MITE: 16.52
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.66
  • UOPS_PORT_3: 1.34
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.51

With loop_count=1000, unroll_count=2, and padding (long NOPs)

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    1e:	0f 1f 84 00 00 00 00 
    25:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 5.01
  • Reference cycles: 5.0
  • UOPS_EXECUTED.CORE: 16.51
  • RETIRE_SLOTS: 17.5
  • UOPS_MITE: 17.52
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.5
  • UOPS_PORT_3: 1.5
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 5.01

With loop_count=100 and unroll_count=20

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.06
  • Reference cycles: 4.05
  • UOPS_EXECUTED.CORE: 16.06
  • RETIRE_SLOTS: 16.05
  • UOPS_MITE: 16.07
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.33
  • UOPS_PORT_3: 1.67
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.06

With loop_count=100, unroll_count=20, and padding (long NOPs)

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    1e:	0f 1f 84 00 00 00 00 
    25:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 5.01
  • Reference cycles: 5.01
  • UOPS_EXECUTED.CORE: 16.06
  • RETIRE_SLOTS: 17.05
  • UOPS_MITE: 17.07
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.5
  • UOPS_PORT_3: 1.5
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 5.01

With unroll_count=100 and no inner loop

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    1e:	00 00 
    20:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    27:	00 00 
    29:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    30:	00 00 
    32:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    39:	00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 8.0
  • UOPS_EXECUTED.CORE: 32.0
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 32.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_2: 4.0
  • UOPS_PORT_3: 4.0
  • UOPS_PORT_4: 8.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    1e:	00 00 
    20:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    27:	00 00 
    29:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    30:	00 00 
    32:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    39:	00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 9.02
  • Reference cycles: 9.01
  • UOPS_EXECUTED.CORE: 33.02
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 33.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.01
  • UOPS_PORT_1: 8.01
  • UOPS_PORT_2: 5.32
  • UOPS_PORT_3: 2.68
  • UOPS_PORT_4: 8.01
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 9.01

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    1e:	0f 1f 84 00 00 00 00 
    25:	00 
    26:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    2d:	00 00 
    2f:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    36:	00 00 
    38:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    3f:	00 00 
    41:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    48:	00 00 
    4a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    51:	0f 1f 84 00 00 00 00 
    58:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 10.02
  • Reference cycles: 10.01
  • UOPS_EXECUTED.CORE: 33.01
  • RETIRE_SLOTS: 35.0
  • UOPS_MITE: 35.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.01
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_2: 5.0
  • UOPS_PORT_3: 3.01
  • UOPS_PORT_4: 8.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 10.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    1e:	00 00 
    20:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    27:	00 00 
    29:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    30:	00 00 
    32:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    39:	00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.12
  • Reference cycles: 8.12
  • UOPS_EXECUTED.CORE: 32.12
  • RETIRE_SLOTS: 32.1
  • UOPS_MITE: 32.14
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.01
  • UOPS_PORT_1: 8.01
  • UOPS_PORT_2: 4.67
  • UOPS_PORT_3: 3.33
  • UOPS_PORT_4: 8.01
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.11

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    1e:	0f 1f 84 00 00 00 00 
    25:	00 
    26:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    2d:	00 00 
    2f:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    36:	00 00 
    38:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    3f:	00 00 
    41:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    48:	00 00 
    4a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    51:	0f 1f 84 00 00 00 00 
    58:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.2
  • Core cycles: 10.02
  • Reference cycles: 10.02
  • UOPS_EXECUTED.CORE: 32.11
  • RETIRE_SLOTS: 34.1
  • UOPS_MITE: 34.13
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.01
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_2: 5.0
  • UOPS_PORT_3: 3.01
  • UOPS_PORT_4: 8.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 10.01

With unroll_count=100 and no inner loop

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    1e:	00 00 
    20:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    27:	00 00 
    29:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    30:	00 00 
    32:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    39:	00 00 
    3b:	c4 c2 7d 2f 8e 00 01 	vmaskmovpd YMMWORD PTR [r14+0x100],ymm0,ymm1
    42:	00 00 
    44:	c4 c2 7d 2f 8e 20 01 	vmaskmovpd YMMWORD PTR [r14+0x120],ymm0,ymm1
    4b:	00 00 
    4d:	c4 c2 7d 2f 8e 40 01 	vmaskmovpd YMMWORD PTR [r14+0x140],ymm0,ymm1
    54:	00 00 
    56:	c4 c2 7d 2f 8e 60 01 	vmaskmovpd YMMWORD PTR [r14+0x160],ymm0,ymm1
    5d:	00 00 
    5f:	c4 c2 7d 2f 8e 80 01 	vmaskmovpd YMMWORD PTR [r14+0x180],ymm0,ymm1
    66:	00 00 
    68:	c4 c2 7d 2f 8e a0 01 	vmaskmovpd YMMWORD PTR [r14+0x1a0],ymm0,ymm1
    6f:	00 00 
    71:	c4 c2 7d 2f 8e c0 01 	vmaskmovpd YMMWORD PTR [r14+0x1c0],ymm0,ymm1
    78:	00 00 
    7a:	c4 c2 7d 2f 8e e0 01 	vmaskmovpd YMMWORD PTR [r14+0x1e0],ymm0,ymm1
    81:	00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 16.0
  • Reference cycles: 15.89
  • UOPS_EXECUTED.CORE: 64.0
  • RETIRE_SLOTS: 64.0
  • UOPS_MITE: 64.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 16.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 16.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    1e:	00 00 
    20:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    27:	00 00 
    29:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    30:	00 00 
    32:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    39:	00 00 
    3b:	c4 c2 7d 2f 8e 00 01 	vmaskmovpd YMMWORD PTR [r14+0x100],ymm0,ymm1
    42:	00 00 
    44:	c4 c2 7d 2f 8e 20 01 	vmaskmovpd YMMWORD PTR [r14+0x120],ymm0,ymm1
    4b:	00 00 
    4d:	c4 c2 7d 2f 8e 40 01 	vmaskmovpd YMMWORD PTR [r14+0x140],ymm0,ymm1
    54:	00 00 
    56:	c4 c2 7d 2f 8e 60 01 	vmaskmovpd YMMWORD PTR [r14+0x160],ymm0,ymm1
    5d:	00 00 
    5f:	c4 c2 7d 2f 8e 80 01 	vmaskmovpd YMMWORD PTR [r14+0x180],ymm0,ymm1
    66:	00 00 
    68:	c4 c2 7d 2f 8e a0 01 	vmaskmovpd YMMWORD PTR [r14+0x1a0],ymm0,ymm1
    6f:	00 00 
    71:	c4 c2 7d 2f 8e c0 01 	vmaskmovpd YMMWORD PTR [r14+0x1c0],ymm0,ymm1
    78:	00 00 
    7a:	c4 c2 7d 2f 8e e0 01 	vmaskmovpd YMMWORD PTR [r14+0x1e0],ymm0,ymm1
    81:	00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 17.02
  • Reference cycles: 17.02
  • UOPS_EXECUTED.CORE: 65.02
  • RETIRE_SLOTS: 65.0
  • UOPS_MITE: 65.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.01
  • UOPS_PORT_1: 16.01
  • UOPS_PORT_2: 9.99
  • UOPS_PORT_3: 6.01
  • UOPS_PORT_4: 16.01
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 17.01

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    1e:	0f 1f 84 00 00 00 00 
    25:	00 
    26:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    2d:	00 00 
    2f:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    36:	00 00 
    38:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    3f:	00 00 
    41:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    48:	00 00 
    4a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    51:	0f 1f 84 00 00 00 00 
    58:	00 
    59:	c4 c2 7d 2f 8e 00 01 	vmaskmovpd YMMWORD PTR [r14+0x100],ymm0,ymm1
    60:	00 00 
    62:	c4 c2 7d 2f 8e 20 01 	vmaskmovpd YMMWORD PTR [r14+0x120],ymm0,ymm1
    69:	00 00 
    6b:	c4 c2 7d 2f 8e 40 01 	vmaskmovpd YMMWORD PTR [r14+0x140],ymm0,ymm1
    72:	00 00 
    74:	c4 c2 7d 2f 8e 60 01 	vmaskmovpd YMMWORD PTR [r14+0x160],ymm0,ymm1
    7b:	00 00 
    7d:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    84:	0f 1f 84 00 00 00 00 
    8b:	00 
    8c:	c4 c2 7d 2f 8e 80 01 	vmaskmovpd YMMWORD PTR [r14+0x180],ymm0,ymm1
    93:	00 00 
    95:	c4 c2 7d 2f 8e a0 01 	vmaskmovpd YMMWORD PTR [r14+0x1a0],ymm0,ymm1
    9c:	00 00 
    9e:	c4 c2 7d 2f 8e c0 01 	vmaskmovpd YMMWORD PTR [r14+0x1c0],ymm0,ymm1
    a5:	00 00 
    a7:	c4 c2 7d 2f 8e e0 01 	vmaskmovpd YMMWORD PTR [r14+0x1e0],ymm0,ymm1
    ae:	00 00 
    b0:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    b7:	0f 1f 84 00 00 00 00 
    be:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 22.0
  • Core cycles: 20.02
  • Reference cycles: 20.02
  • UOPS_EXECUTED.CORE: 65.01
  • RETIRE_SLOTS: 69.0
  • UOPS_MITE: 69.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.01
  • UOPS_PORT_1: 16.0
  • UOPS_PORT_2: 10.0
  • UOPS_PORT_3: 6.01
  • UOPS_PORT_4: 16.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 20.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    1e:	00 00 
    20:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    27:	00 00 
    29:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    30:	00 00 
    32:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    39:	00 00 
    3b:	c4 c2 7d 2f 8e 00 01 	vmaskmovpd YMMWORD PTR [r14+0x100],ymm0,ymm1
    42:	00 00 
    44:	c4 c2 7d 2f 8e 20 01 	vmaskmovpd YMMWORD PTR [r14+0x120],ymm0,ymm1
    4b:	00 00 
    4d:	c4 c2 7d 2f 8e 40 01 	vmaskmovpd YMMWORD PTR [r14+0x140],ymm0,ymm1
    54:	00 00 
    56:	c4 c2 7d 2f 8e 60 01 	vmaskmovpd YMMWORD PTR [r14+0x160],ymm0,ymm1
    5d:	00 00 
    5f:	c4 c2 7d 2f 8e 80 01 	vmaskmovpd YMMWORD PTR [r14+0x180],ymm0,ymm1
    66:	00 00 
    68:	c4 c2 7d 2f 8e a0 01 	vmaskmovpd YMMWORD PTR [r14+0x1a0],ymm0,ymm1
    6f:	00 00 
    71:	c4 c2 7d 2f 8e c0 01 	vmaskmovpd YMMWORD PTR [r14+0x1c0],ymm0,ymm1
    78:	00 00 
    7a:	c4 c2 7d 2f 8e e0 01 	vmaskmovpd YMMWORD PTR [r14+0x1e0],ymm0,ymm1
    81:	00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 16.12
  • Reference cycles: 16.11
  • UOPS_EXECUTED.CORE: 64.12
  • RETIRE_SLOTS: 64.1
  • UOPS_MITE: 64.14
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.01
  • UOPS_PORT_1: 16.01
  • UOPS_PORT_2: 9.42
  • UOPS_PORT_3: 6.58
  • UOPS_PORT_4: 16.01
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.11

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 c2 7d 2f 0e       	vmaskmovpd YMMWORD PTR [r14],ymm0,ymm1
     5:	c4 c2 7d 2f 4e 20    	vmaskmovpd YMMWORD PTR [r14+0x20],ymm0,ymm1
     b:	c4 c2 7d 2f 4e 40    	vmaskmovpd YMMWORD PTR [r14+0x40],ymm0,ymm1
    11:	c4 c2 7d 2f 4e 60    	vmaskmovpd YMMWORD PTR [r14+0x60],ymm0,ymm1
    17:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    1e:	0f 1f 84 00 00 00 00 
    25:	00 
    26:	c4 c2 7d 2f 8e 80 00 	vmaskmovpd YMMWORD PTR [r14+0x80],ymm0,ymm1
    2d:	00 00 
    2f:	c4 c2 7d 2f 8e a0 00 	vmaskmovpd YMMWORD PTR [r14+0xa0],ymm0,ymm1
    36:	00 00 
    38:	c4 c2 7d 2f 8e c0 00 	vmaskmovpd YMMWORD PTR [r14+0xc0],ymm0,ymm1
    3f:	00 00 
    41:	c4 c2 7d 2f 8e e0 00 	vmaskmovpd YMMWORD PTR [r14+0xe0],ymm0,ymm1
    48:	00 00 
    4a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    51:	0f 1f 84 00 00 00 00 
    58:	00 
    59:	c4 c2 7d 2f 8e 00 01 	vmaskmovpd YMMWORD PTR [r14+0x100],ymm0,ymm1
    60:	00 00 
    62:	c4 c2 7d 2f 8e 20 01 	vmaskmovpd YMMWORD PTR [r14+0x120],ymm0,ymm1
    69:	00 00 
    6b:	c4 c2 7d 2f 8e 40 01 	vmaskmovpd YMMWORD PTR [r14+0x140],ymm0,ymm1
    72:	00 00 
    74:	c4 c2 7d 2f 8e 60 01 	vmaskmovpd YMMWORD PTR [r14+0x160],ymm0,ymm1
    7b:	00 00 
    7d:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    84:	0f 1f 84 00 00 00 00 
    8b:	00 
    8c:	c4 c2 7d 2f 8e 80 01 	vmaskmovpd YMMWORD PTR [r14+0x180],ymm0,ymm1
    93:	00 00 
    95:	c4 c2 7d 2f 8e a0 01 	vmaskmovpd YMMWORD PTR [r14+0x1a0],ymm0,ymm1
    9c:	00 00 
    9e:	c4 c2 7d 2f 8e c0 01 	vmaskmovpd YMMWORD PTR [r14+0x1c0],ymm0,ymm1
    a5:	00 00 
    a7:	c4 c2 7d 2f 8e e0 01 	vmaskmovpd YMMWORD PTR [r14+0x1e0],ymm0,ymm1
    ae:	00 00 
    b0:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    b7:	0f 1f 84 00 00 00 00 
    be:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 20.2
  • Core cycles: 20.02
  • Reference cycles: 20.02
  • UOPS_EXECUTED.CORE: 64.11
  • RETIRE_SLOTS: 68.1
  • UOPS_MITE: 68.13
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.01
  • UOPS_PORT_1: 16.0
  • UOPS_PORT_2: 10.0
  • UOPS_PORT_3: 6.01
  • UOPS_PORT_4: 16.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 20.01

With unroll_count=500 and no inner loop

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.99
  • UOPS_EXECUTED.CORE: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 2.0
  • Reference cycles: 1.99
  • UOPS_EXECUTED.CORE: 4.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.2
  • UOPS_PORT_3: 0.8
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.1
  • Reference cycles: 1.1
  • UOPS_EXECUTED.CORE: 4.1
  • RETIRE_SLOTS: 4.1
  • UOPS_MITE: 4.1
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.6
  • UOPS_PORT_3: 0.4
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With loop_count=1000, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
     d:	0f 1f 84 00 00 00 00 
    14:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 1.3
  • Reference cycles: 1.3
  • UOPS_EXECUTED.CORE: 4.1
  • RETIRE_SLOTS: 5.1
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.45
  • UOPS_PORT_3: 0.55
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.01
  • Reference cycles: 1.01
  • UOPS_EXECUTED.CORE: 4.01
  • RETIRE_SLOTS: 4.01
  • UOPS_MITE: 4.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.6
  • UOPS_PORT_3: 0.4
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With loop_count=100, unroll_count=100, and padding (long NOPs)

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
     d:	0f 1f 84 00 00 00 00 
    14:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 1.26
  • Reference cycles: 1.26
  • UOPS_EXECUTED.CORE: 4.01
  • RETIRE_SLOTS: 5.01
  • UOPS_MITE: 0.05
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_2: 0.42
  • UOPS_PORT_3: 0.58
  • UOPS_PORT_4: 1.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02

With unroll_count=200 and no inner loop

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.0
  • Reference cycles: 4.0
  • UOPS_EXECUTED.CORE: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 16.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.0
  • UOPS_PORT_3: 2.0
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.51
  • Reference cycles: 4.51
  • UOPS_EXECUTED.CORE: 16.51
  • RETIRE_SLOTS: 16.5
  • UOPS_MITE: 16.52
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.66
  • UOPS_PORT_3: 1.34
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.51

With loop_count=1000, unroll_count=2, and padding (long NOPs)

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 5.01
  • Reference cycles: 5.0
  • UOPS_EXECUTED.CORE: 16.51
  • RETIRE_SLOTS: 17.5
  • UOPS_MITE: 17.52
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.5
  • UOPS_PORT_3: 1.5
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 5.01

With loop_count=100 and unroll_count=20

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.06
  • Reference cycles: 4.05
  • UOPS_EXECUTED.CORE: 16.06
  • RETIRE_SLOTS: 16.05
  • UOPS_MITE: 16.07
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.33
  • UOPS_PORT_3: 1.67
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.06

With loop_count=100, unroll_count=20, and padding (long NOPs)

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 5.01
  • Reference cycles: 5.0
  • UOPS_EXECUTED.CORE: 16.06
  • RETIRE_SLOTS: 17.05
  • UOPS_MITE: 17.07
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_2: 2.5
  • UOPS_PORT_3: 1.5
  • UOPS_PORT_4: 4.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 5.0

With unroll_count=100 and no inner loop

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    22:	00 00 00 
    25:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    2c:	00 00 00 
    2f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    36:	00 00 00 
    39:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    40:	00 00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 8.11
  • UOPS_EXECUTED.CORE: 32.0
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 32.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_2: 4.0
  • UOPS_PORT_3: 4.0
  • UOPS_PORT_4: 8.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    22:	00 00 00 
    25:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    2c:	00 00 00 
    2f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    36:	00 00 00 
    39:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    40:	00 00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 9.02
  • Reference cycles: 9.01
  • UOPS_EXECUTED.CORE: 33.02
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 33.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.01
  • UOPS_PORT_1: 8.01
  • UOPS_PORT_2: 5.32
  • UOPS_PORT_3: 2.68
  • UOPS_PORT_4: 8.01
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 9.01

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
    2a:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    31:	00 00 00 
    34:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    3b:	00 00 00 
    3e:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    45:	00 00 00 
    48:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    4f:	00 00 00 
    52:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    59:	0f 1f 84 00 00 00 00 
    60:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 10.02
  • Reference cycles: 10.02
  • UOPS_EXECUTED.CORE: 33.01
  • RETIRE_SLOTS: 35.01
  • UOPS_MITE: 35.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.01
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_2: 5.0
  • UOPS_PORT_3: 3.01
  • UOPS_PORT_4: 8.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 10.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    22:	00 00 00 
    25:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    2c:	00 00 00 
    2f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    36:	00 00 00 
    39:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    40:	00 00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.12
  • Reference cycles: 8.12
  • UOPS_EXECUTED.CORE: 32.12
  • RETIRE_SLOTS: 32.1
  • UOPS_MITE: 32.14
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.01
  • UOPS_PORT_1: 8.01
  • UOPS_PORT_2: 4.67
  • UOPS_PORT_3: 3.33
  • UOPS_PORT_4: 8.01
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.11

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
    2a:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    31:	00 00 00 
    34:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    3b:	00 00 00 
    3e:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    45:	00 00 00 
    48:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    4f:	00 00 00 
    52:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    59:	0f 1f 84 00 00 00 00 
    60:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 10.2
  • Core cycles: 10.02
  • Reference cycles: 10.01
  • UOPS_EXECUTED.CORE: 32.11
  • RETIRE_SLOTS: 34.1
  • UOPS_MITE: 34.13
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.01
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_2: 5.0
  • UOPS_PORT_3: 3.01
  • UOPS_PORT_4: 8.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 10.01

With unroll_count=100 and no inner loop

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    22:	00 00 00 
    25:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    2c:	00 00 00 
    2f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    36:	00 00 00 
    39:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    40:	00 00 00 
    43:	c4 82 7d 2f 8c 2e 00 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x100],ymm0,ymm1
    4a:	01 00 00 
    4d:	c4 82 7d 2f 8c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x120],ymm0,ymm1
    54:	01 00 00 
    57:	c4 82 7d 2f 8c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x140],ymm0,ymm1
    5e:	01 00 00 
    61:	c4 82 7d 2f 8c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x160],ymm0,ymm1
    68:	01 00 00 
    6b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x180],ymm0,ymm1
    72:	01 00 00 
    75:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1a0],ymm0,ymm1
    7c:	01 00 00 
    7f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1c0],ymm0,ymm1
    86:	01 00 00 
    89:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1e0],ymm0,ymm1
    90:	01 00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 16.0
  • Reference cycles: 16.0
  • UOPS_EXECUTED.CORE: 64.0
  • RETIRE_SLOTS: 64.0
  • UOPS_MITE: 64.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 16.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 16.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    22:	00 00 00 
    25:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    2c:	00 00 00 
    2f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    36:	00 00 00 
    39:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    40:	00 00 00 
    43:	c4 82 7d 2f 8c 2e 00 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x100],ymm0,ymm1
    4a:	01 00 00 
    4d:	c4 82 7d 2f 8c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x120],ymm0,ymm1
    54:	01 00 00 
    57:	c4 82 7d 2f 8c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x140],ymm0,ymm1
    5e:	01 00 00 
    61:	c4 82 7d 2f 8c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x160],ymm0,ymm1
    68:	01 00 00 
    6b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x180],ymm0,ymm1
    72:	01 00 00 
    75:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1a0],ymm0,ymm1
    7c:	01 00 00 
    7f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1c0],ymm0,ymm1
    86:	01 00 00 
    89:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1e0],ymm0,ymm1
    90:	01 00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 17.02
  • Reference cycles: 17.02
  • UOPS_EXECUTED.CORE: 65.02
  • RETIRE_SLOTS: 65.0
  • UOPS_MITE: 65.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.01
  • UOPS_PORT_1: 16.01
  • UOPS_PORT_2: 9.99
  • UOPS_PORT_3: 6.01
  • UOPS_PORT_4: 16.01
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 17.01

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
    2a:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    31:	00 00 00 
    34:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    3b:	00 00 00 
    3e:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    45:	00 00 00 
    48:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    4f:	00 00 00 
    52:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    59:	0f 1f 84 00 00 00 00 
    60:	00 
    61:	c4 82 7d 2f 8c 2e 00 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x100],ymm0,ymm1
    68:	01 00 00 
    6b:	c4 82 7d 2f 8c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x120],ymm0,ymm1
    72:	01 00 00 
    75:	c4 82 7d 2f 8c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x140],ymm0,ymm1
    7c:	01 00 00 
    7f:	c4 82 7d 2f 8c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x160],ymm0,ymm1
    86:	01 00 00 
    89:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    90:	0f 1f 84 00 00 00 00 
    97:	00 
    98:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x180],ymm0,ymm1
    9f:	01 00 00 
    a2:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1a0],ymm0,ymm1
    a9:	01 00 00 
    ac:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1c0],ymm0,ymm1
    b3:	01 00 00 
    b6:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1e0],ymm0,ymm1
    bd:	01 00 00 
    c0:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    c7:	0f 1f 84 00 00 00 00 
    ce:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 22.0
  • Core cycles: 20.01
  • Reference cycles: 20.02
  • UOPS_EXECUTED.CORE: 65.01
  • RETIRE_SLOTS: 69.0
  • UOPS_MITE: 69.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.01
  • UOPS_PORT_1: 16.0
  • UOPS_PORT_2: 10.0
  • UOPS_PORT_3: 6.01
  • UOPS_PORT_4: 16.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 20.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    22:	00 00 00 
    25:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    2c:	00 00 00 
    2f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    36:	00 00 00 
    39:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    40:	00 00 00 
    43:	c4 82 7d 2f 8c 2e 00 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x100],ymm0,ymm1
    4a:	01 00 00 
    4d:	c4 82 7d 2f 8c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x120],ymm0,ymm1
    54:	01 00 00 
    57:	c4 82 7d 2f 8c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x140],ymm0,ymm1
    5e:	01 00 00 
    61:	c4 82 7d 2f 8c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x160],ymm0,ymm1
    68:	01 00 00 
    6b:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x180],ymm0,ymm1
    72:	01 00 00 
    75:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1a0],ymm0,ymm1
    7c:	01 00 00 
    7f:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1c0],ymm0,ymm1
    86:	01 00 00 
    89:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1e0],ymm0,ymm1
    90:	01 00 00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 16.12
  • Reference cycles: 16.11
  • UOPS_EXECUTED.CORE: 64.12
  • RETIRE_SLOTS: 64.1
  • UOPS_MITE: 64.14
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.01
  • UOPS_PORT_1: 16.01
  • UOPS_PORT_2: 9.42
  • UOPS_PORT_3: 6.58
  • UOPS_PORT_4: 16.01
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.11

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 82 7d 2f 0c 2e    	vmaskmovpd YMMWORD PTR [r14+r13*1],ymm0,ymm1
     6:	c4 82 7d 2f 4c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x20],ymm0,ymm1
     d:	c4 82 7d 2f 4c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x40],ymm0,ymm1
    14:	c4 82 7d 2f 4c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x60],ymm0,ymm1
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
    2a:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x80],ymm0,ymm1
    31:	00 00 00 
    34:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xa0],ymm0,ymm1
    3b:	00 00 00 
    3e:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xc0],ymm0,ymm1
    45:	00 00 00 
    48:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0xe0],ymm0,ymm1
    4f:	00 00 00 
    52:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    59:	0f 1f 84 00 00 00 00 
    60:	00 
    61:	c4 82 7d 2f 8c 2e 00 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x100],ymm0,ymm1
    68:	01 00 00 
    6b:	c4 82 7d 2f 8c 2e 20 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x120],ymm0,ymm1
    72:	01 00 00 
    75:	c4 82 7d 2f 8c 2e 40 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x140],ymm0,ymm1
    7c:	01 00 00 
    7f:	c4 82 7d 2f 8c 2e 60 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x160],ymm0,ymm1
    86:	01 00 00 
    89:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    90:	0f 1f 84 00 00 00 00 
    97:	00 
    98:	c4 82 7d 2f 8c 2e 80 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x180],ymm0,ymm1
    9f:	01 00 00 
    a2:	c4 82 7d 2f 8c 2e a0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1a0],ymm0,ymm1
    a9:	01 00 00 
    ac:	c4 82 7d 2f 8c 2e c0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1c0],ymm0,ymm1
    b3:	01 00 00 
    b6:	c4 82 7d 2f 8c 2e e0 	vmaskmovpd YMMWORD PTR [r14+r13*1+0x1e0],ymm0,ymm1
    bd:	01 00 00 
    c0:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    c7:	0f 1f 84 00 00 00 00 
    ce:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 20.2
  • Core cycles: 20.02
  • Reference cycles: 20.01
  • UOPS_EXECUTED.CORE: 64.11
  • RETIRE_SLOTS: 68.1
  • UOPS_MITE: 68.13
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.01
  • UOPS_PORT_1: 16.0
  • UOPS_PORT_2: 10.0
  • UOPS_PORT_3: 6.01
  • UOPS_PORT_4: 16.0
  • UOPS_PORT_5: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 20.01