VAESENC (XMM, XMM, XMM) - Throughput and Uops (IACA 2.3)
With different registers for different operands
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm0, xmm1, xmm2
Total Num Of Uops: 1
With 11 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 11.00 Cycles Throughput Bottleneck: Backend. Port5
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 11.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm0, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm3, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm4, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm5, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm6, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm7, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm8, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm9, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm10, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm11, xmm1, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm12, xmm1, xmm2
Total Num Of Uops: 11
With the same register for for different operands
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 6.67 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm0, xmm0, xmm0
Total Num Of Uops: 1
With 13 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 13.00 Cycles Throughput Bottleneck: Backend. Port5
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 13.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm0, xmm0, xmm0
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm1, xmm1, xmm1
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm2, xmm2, xmm2
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm3, xmm3, xmm3
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm4, xmm4, xmm4
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm5, xmm5, xmm5
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm6, xmm6, xmm6
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm7, xmm7, xmm7
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm8, xmm8, xmm8
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm9, xmm9, xmm9
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm10, xmm10, xmm10
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm11, xmm11, xmm11
| 1 | | | | | | 1.0 | | | CP | vaesenc xmm12, xmm12, xmm12
Total Num Of Uops: 13