TZCNT (R16, R16) - Throughput and Uops (IACA 3.0)
With different registers for different operands
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 0.98 Cycles Throughput Bottleneck: Dependency chains
Loop Count: 60
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | tzcnt r8w, r9w
Total Num Of Uops: 1
With 12 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 11.95 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 12.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | tzcnt r8w, r9w
| 1 | | 1.0 | | | | | | | tzcnt r10w, r9w
| 1 | | 1.0 | | | | | | | tzcnt r11w, r9w
| 1 | | 1.0 | | | | | | | tzcnt r12w, r9w
| 1 | | 1.0 | | | | | | | tzcnt r13w, r9w
| 1 | | 1.0 | | | | | | | tzcnt r14w, r9w
| 1 | | 1.0 | | | | | | | tzcnt bx, r9w
| 1 | | 1.0 | | | | | | | tzcnt cx, r9w
| 1 | | 1.0 | | | | | | | tzcnt dx, r9w
| 1 | | 1.0 | | | | | | | tzcnt di, r9w
| 1 | | 1.0 | | | | | | | tzcnt si, r9w
| 1 | | 1.0 | | | | | | | tzcnt bp, r9w
Total Num Of Uops: 12
With the same register for for different operands
Throughput Analysis Report
--------------------------
Block Throughput: 2.96 Cycles Throughput Bottleneck: Backend
Loop Count: 77
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | tzcnt r8w, r8w
Total Num Of Uops: 1