ADD (M32, I32) - Throughput and Uops (IACA 2.3)


With a non-indexed addressing mode

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles       Throughput Bottleneck: Backend. Port4

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 0.2    0.0  | 0.2  | 0.6    0.5  | 0.7    0.5  | 1.0  | 0.2  | 0.2  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   4^   | 0.2       | 0.2 | 0.6   0.5 | 0.7   0.5 | 1.0 | 0.2 | 0.2 | 0.6 | CP | add dword ptr [r14], 0x1000000
Total Num Of Uops: 4

With 16 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 16.00 Cycles       Throughput Bottleneck: Backend. Port4

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 4.0    0.0  | 4.0  | 10.7   8.0  | 10.6   8.0  | 16.0 | 4.0  | 4.0  | 10.6 |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   4^   | 1.0       |     | 1.0   1.0 | 0.3       | 1.0 |     |     | 0.6 | CP | add dword ptr [r14], 0x1000000
|   4^   |           | 1.0 | 0.3       | 1.0   1.0 | 1.0 |     |     | 0.6 | CP | add dword ptr [r14+0x4], 0x1000000
|   4^   |           |     | 1.0   1.0 | 0.3       | 1.0 | 1.0 |     | 0.7 | CP | add dword ptr [r14+0x8], 0x1000000
|   4^   |           |     | 0.3       | 1.0   1.0 | 1.0 |     | 1.0 | 0.6 | CP | add dword ptr [r14+0xc], 0x1000000
|   4^   | 1.0       |     | 1.0   1.0 | 0.3       | 1.0 |     |     | 0.6 | CP | add dword ptr [r14+0x10], 0x1000000
|   4^   |           | 1.0 | 0.3       | 1.0   1.0 | 1.0 |     |     | 0.7 | CP | add dword ptr [r14+0x14], 0x1000000
|   4^   |           |     | 1.0   1.0 | 0.3       | 1.0 | 1.0 |     | 0.6 | CP | add dword ptr [r14+0x18], 0x1000000
|   4^   |           |     | 0.3       | 1.0   1.0 | 1.0 |     | 1.0 | 0.6 | CP | add dword ptr [r14+0x1c], 0x1000000
|   4^   | 1.0       |     | 1.0   1.0 | 0.3       | 1.0 |     |     | 0.7 | CP | add dword ptr [r14+0x20], 0x1000000
|   4^   |           | 1.0 | 0.3       | 1.0   1.0 | 1.0 |     |     | 0.6 | CP | add dword ptr [r14+0x24], 0x1000000
|   4^   |           |     | 1.0   1.0 | 0.3       | 1.0 | 1.0 |     | 0.6 | CP | add dword ptr [r14+0x28], 0x1000000
|   4^   |           |     | 0.3       | 1.0   1.0 | 1.0 |     | 1.0 | 0.7 | CP | add dword ptr [r14+0x2c], 0x1000000
|   4^   | 1.0       |     | 1.0   1.0 | 0.3       | 1.0 |     |     | 0.6 | CP | add dword ptr [r14+0x30], 0x1000000
|   4^   |           | 1.0 | 0.3       | 1.0   1.0 | 1.0 |     |     | 0.6 | CP | add dword ptr [r14+0x34], 0x1000000
|   4^   |           |     | 1.0   1.0 | 0.3       | 1.0 | 1.0 |     | 0.7 | CP | add dword ptr [r14+0x38], 0x1000000
|   4^   |           |     | 0.3       | 1.0   1.0 | 1.0 |     | 1.0 | 0.6 | CP | add dword ptr [r14+0x3c], 0x1000000
Total Num Of Uops: 64

With an indexed addressing mode

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 0.2    0.0  | 0.2  | 1.0    0.5  | 1.0    0.5  | 1.0  | 0.2  | 0.2  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   4    | 0.2       | 0.2 | 1.0   0.5 | 1.0   0.5 | 1.0 | 0.2 | 0.2 |     | CP | add dword ptr [r14+r13*1], 0x1000000
Total Num Of Uops: 4

With 16 independent instructions


Throughput Analysis Report
--------------------------
Block Throughput: 16.00 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 4.0    0.0  | 4.0  | 16.0   8.0  | 16.0   8.0  | 16.0 | 4.0  | 4.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   4    | 1.0       |     | 1.0   1.0 | 1.0       | 1.0 |     |     |     | CP | add dword ptr [r14+r13*1], 0x1000000
|   4    |           | 1.0 | 1.0       | 1.0   1.0 | 1.0 |     |     |     | CP | add dword ptr [r14+r13*1+0x4], 0x1000000
|   4    |           |     | 1.0   1.0 | 1.0       | 1.0 | 1.0 |     |     | CP | add dword ptr [r14+r13*1+0x8], 0x1000000
|   4    |           |     | 1.0       | 1.0   1.0 | 1.0 |     | 1.0 |     | CP | add dword ptr [r14+r13*1+0xc], 0x1000000
|   4    | 1.0       |     | 1.0   1.0 | 1.0       | 1.0 |     |     |     | CP | add dword ptr [r14+r13*1+0x10], 0x1000000
|   4    |           | 1.0 | 1.0       | 1.0   1.0 | 1.0 |     |     |     | CP | add dword ptr [r14+r13*1+0x14], 0x1000000
|   4    |           |     | 1.0   1.0 | 1.0       | 1.0 | 1.0 |     |     | CP | add dword ptr [r14+r13*1+0x18], 0x1000000
|   4    |           |     | 1.0       | 1.0   1.0 | 1.0 |     | 1.0 |     | CP | add dword ptr [r14+r13*1+0x1c], 0x1000000
|   4    | 1.0       |     | 1.0   1.0 | 1.0       | 1.0 |     |     |     | CP | add dword ptr [r14+r13*1+0x20], 0x1000000
|   4    |           | 1.0 | 1.0       | 1.0   1.0 | 1.0 |     |     |     | CP | add dword ptr [r14+r13*1+0x24], 0x1000000
|   4    |           |     | 1.0   1.0 | 1.0       | 1.0 | 1.0 |     |     | CP | add dword ptr [r14+r13*1+0x28], 0x1000000
|   4    |           |     | 1.0       | 1.0   1.0 | 1.0 |     | 1.0 |     | CP | add dword ptr [r14+r13*1+0x2c], 0x1000000
|   4    | 1.0       |     | 1.0   1.0 | 1.0       | 1.0 |     |     |     | CP | add dword ptr [r14+r13*1+0x30], 0x1000000
|   4    |           | 1.0 | 1.0       | 1.0   1.0 | 1.0 |     |     |     | CP | add dword ptr [r14+r13*1+0x34], 0x1000000
|   4    |           |     | 1.0   1.0 | 1.0       | 1.0 | 1.0 |     |     | CP | add dword ptr [r14+r13*1+0x38], 0x1000000
|   4    |           |     | 1.0       | 1.0   1.0 | 1.0 |     | 1.0 |     | CP | add dword ptr [r14+r13*1+0x3c], 0x1000000
Total Num Of Uops: 64