VPCOMPRESSB (ZMM, K, ZMM)

With unroll_count=500 and no inner loop

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 1.92
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.0
- Reference cycles: 1.95
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 3.0
- UOPS_MITE: 3.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	90                   	nop
   7:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 3.0
- Reference cycles: 2.05
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 3.0
- Reference cycles: 1.81
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 5.0
- UOPS_MITE: 5.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop
   9:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 3.0
- Reference cycles: 2.05
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 6.0
- UOPS_MITE: 6.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 5 NOPs

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop
   9:	90                   	nop
   a:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 3.0
- Reference cycles: 1.79
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 7.0
- UOPS_MITE: 7.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 1.96
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 1.77
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 8.0
- Reference cycles: 5.4
- UOPS_EXECUTED.THREAD: 7.99
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.01
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 8.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 8.0
- Reference cycles: 4.85
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 8.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 8.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 8.0
- Reference cycles: 4.87
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 8.05
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 8.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1
  18:	62 f2 7d 49 63 cd    	vpcompressb zmm5{k1},zmm1
  1e:	62 f2 7d 49 63 ce    	vpcompressb zmm6{k1},zmm1
  24:	62 f2 7d 49 63 cf    	vpcompressb zmm7{k1},zmm1
  2a:	62 d2 7d 49 63 c8    	vpcompressb zmm8{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 16.01
- Reference cycles: 9.33
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.01
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 16.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1
  18:	62 f2 7d 49 63 cd    	vpcompressb zmm5{k1},zmm1
  1e:	62 f2 7d 49 63 ce    	vpcompressb zmm6{k1},zmm1
  24:	62 f2 7d 49 63 cf    	vpcompressb zmm7{k1},zmm1
  2a:	62 d2 7d 49 63 c8    	vpcompressb zmm8{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 16.01
- Reference cycles: 10.71
- UOPS_EXECUTED.THREAD: 17.0
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 16.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.77

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1
  18:	62 f2 7d 49 63 cd    	vpcompressb zmm5{k1},zmm1
  1e:	62 f2 7d 49 63 ce    	vpcompressb zmm6{k1},zmm1
  24:	62 f2 7d 49 63 cf    	vpcompressb zmm7{k1},zmm1
  2a:	62 d2 7d 49 63 c8    	vpcompressb zmm8{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 16.01
- Reference cycles: 9.72
- UOPS_EXECUTED.THREAD: 16.1
- RETIRE_SLOTS: 16.11
- UOPS_MITE: 0.18
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 16.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.08

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1
  18:	62 f2 7d 49 63 cd    	vpcompressb zmm5{k1},zmm1
  1e:	62 f2 7d 49 63 ce    	vpcompressb zmm6{k1},zmm1
  24:	62 f2 7d 49 63 cf    	vpcompressb zmm7{k1},zmm1
  2a:	62 d2 7d 49 63 c8    	vpcompressb zmm8{k1},zmm1
  30:	62 d2 7d 49 63 c9    	vpcompressb zmm9{k1},zmm1
  36:	62 d2 7d 49 63 ca    	vpcompressb zmm10{k1},zmm1
  3c:	62 d2 7d 49 63 cb    	vpcompressb zmm11{k1},zmm1
  42:	62 d2 7d 49 63 cc    	vpcompressb zmm12{k1},zmm1
  48:	62 b2 7d 49 63 c8    	vpcompressb zmm16{k1},zmm1
  4e:	62 b2 7d 49 63 c9    	vpcompressb zmm17{k1},zmm1
  54:	62 b2 7d 49 63 ca    	vpcompressb zmm18{k1},zmm1
  5a:	62 b2 7d 49 63 cb    	vpcompressb zmm19{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18;
VXORPS ZMM19, ZMM19, ZMM19

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 31.99
- Reference cycles: 21.2
- UOPS_EXECUTED.THREAD: 32.0
- RETIRE_SLOTS: 32.0
- UOPS_MITE: 32.0
- UOPS_MS: 0.01
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 32.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1
  18:	62 f2 7d 49 63 cd    	vpcompressb zmm5{k1},zmm1
  1e:	62 f2 7d 49 63 ce    	vpcompressb zmm6{k1},zmm1
  24:	62 f2 7d 49 63 cf    	vpcompressb zmm7{k1},zmm1
  2a:	62 d2 7d 49 63 c8    	vpcompressb zmm8{k1},zmm1
  30:	62 d2 7d 49 63 c9    	vpcompressb zmm9{k1},zmm1
  36:	62 d2 7d 49 63 ca    	vpcompressb zmm10{k1},zmm1
  3c:	62 d2 7d 49 63 cb    	vpcompressb zmm11{k1},zmm1
  42:	62 d2 7d 49 63 cc    	vpcompressb zmm12{k1},zmm1
  48:	62 b2 7d 49 63 c8    	vpcompressb zmm16{k1},zmm1
  4e:	62 b2 7d 49 63 c9    	vpcompressb zmm17{k1},zmm1
  54:	62 b2 7d 49 63 ca    	vpcompressb zmm18{k1},zmm1
  5a:	62 b2 7d 49 63 cb    	vpcompressb zmm19{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18;
VXORPS ZMM19, ZMM19, ZMM19

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 32.01
- Reference cycles: 21.36
- UOPS_EXECUTED.THREAD: 33.0
- RETIRE_SLOTS: 33.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 32.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 7d 49 63 c8    	vpcompressb zmm0{k1},zmm1
   6:	62 f2 7d 49 63 ca    	vpcompressb zmm2{k1},zmm1
   c:	62 f2 7d 49 63 cb    	vpcompressb zmm3{k1},zmm1
  12:	62 f2 7d 49 63 cc    	vpcompressb zmm4{k1},zmm1
  18:	62 f2 7d 49 63 cd    	vpcompressb zmm5{k1},zmm1
  1e:	62 f2 7d 49 63 ce    	vpcompressb zmm6{k1},zmm1
  24:	62 f2 7d 49 63 cf    	vpcompressb zmm7{k1},zmm1
  2a:	62 d2 7d 49 63 c8    	vpcompressb zmm8{k1},zmm1
  30:	62 d2 7d 49 63 c9    	vpcompressb zmm9{k1},zmm1
  36:	62 d2 7d 49 63 ca    	vpcompressb zmm10{k1},zmm1
  3c:	62 d2 7d 49 63 cb    	vpcompressb zmm11{k1},zmm1
  42:	62 d2 7d 49 63 cc    	vpcompressb zmm12{k1},zmm1
  48:	62 b2 7d 49 63 c8    	vpcompressb zmm16{k1},zmm1
  4e:	62 b2 7d 49 63 c9    	vpcompressb zmm17{k1},zmm1
  54:	62 b2 7d 49 63 ca    	vpcompressb zmm18{k1},zmm1
  5a:	62 b2 7d 49 63 cb    	vpcompressb zmm19{k1},zmm1

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18;
VXORPS ZMM19, ZMM19, ZMM19

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 32.01
- Reference cycles: 19.41
- UOPS_EXECUTED.THREAD: 32.1
- RETIRE_SLOTS: 32.1
- UOPS_MITE: 0.32
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 32.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.17

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 1.92
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.0
- Reference cycles: 1.71
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 3.0
- UOPS_MITE: 3.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	90                   	nop
   7:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 3.0
- Reference cycles: 1.92
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 3.0
- Reference cycles: 1.95
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 5.0
- UOPS_MITE: 5.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop
   9:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 3.0
- Reference cycles: 1.89
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 6.0
- UOPS_MITE: 6.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 5 NOPs

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop
   9:	90                   	nop
   a:	90                   	nop

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 3.0
- Reference cycles: 2.03
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 7.0
- UOPS_MITE: 7.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 2.0
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 1.82
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 2.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 8.0
- Reference cycles: 4.6
- UOPS_EXECUTED.THREAD: 7.99
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.01
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 8.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 8.0
- Reference cycles: 5.33
- UOPS_EXECUTED.THREAD: 8.5
- RETIRE_SLOTS: 8.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 8.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 8.0
- Reference cycles: 4.84
- UOPS_EXECUTED.THREAD: 8.05
- RETIRE_SLOTS: 8.05
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 8.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3
  18:	62 f2 7d 49 63 e4    	vpcompressb zmm4{k1},zmm4
  1e:	62 f2 7d 49 63 ed    	vpcompressb zmm5{k1},zmm5
  24:	62 f2 7d 49 63 f6    	vpcompressb zmm6{k1},zmm6
  2a:	62 f2 7d 49 63 ff    	vpcompressb zmm7{k1},zmm7

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 16.01
- Reference cycles: 10.8
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 16.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3
  18:	62 f2 7d 49 63 e4    	vpcompressb zmm4{k1},zmm4
  1e:	62 f2 7d 49 63 ed    	vpcompressb zmm5{k1},zmm5
  24:	62 f2 7d 49 63 f6    	vpcompressb zmm6{k1},zmm6
  2a:	62 f2 7d 49 63 ff    	vpcompressb zmm7{k1},zmm7

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 16.01
- Reference cycles: 10.65
- UOPS_EXECUTED.THREAD: 17.0
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 16.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3
  18:	62 f2 7d 49 63 e4    	vpcompressb zmm4{k1},zmm4
  1e:	62 f2 7d 49 63 ed    	vpcompressb zmm5{k1},zmm5
  24:	62 f2 7d 49 63 f6    	vpcompressb zmm6{k1},zmm6
  2a:	62 f2 7d 49 63 ff    	vpcompressb zmm7{k1},zmm7

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 16.01
- Reference cycles: 9.68
- UOPS_EXECUTED.THREAD: 16.1
- RETIRE_SLOTS: 16.11
- UOPS_MITE: 0.18
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 16.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.08

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3
  18:	62 f2 7d 49 63 e4    	vpcompressb zmm4{k1},zmm4
  1e:	62 f2 7d 49 63 ed    	vpcompressb zmm5{k1},zmm5
  24:	62 f2 7d 49 63 f6    	vpcompressb zmm6{k1},zmm6
  2a:	62 f2 7d 49 63 ff    	vpcompressb zmm7{k1},zmm7
  30:	62 52 7d 49 63 c0    	vpcompressb zmm8{k1},zmm8
  36:	62 52 7d 49 63 c9    	vpcompressb zmm9{k1},zmm9
  3c:	62 52 7d 49 63 d2    	vpcompressb zmm10{k1},zmm10
  42:	62 52 7d 49 63 db    	vpcompressb zmm11{k1},zmm11
  48:	62 52 7d 49 63 e4    	vpcompressb zmm12{k1},zmm12
  4e:	62 a2 7d 49 63 c0    	vpcompressb zmm16{k1},zmm16
  54:	62 a2 7d 49 63 c9    	vpcompressb zmm17{k1},zmm17
  5a:	62 a2 7d 49 63 d2    	vpcompressb zmm18{k1},zmm18

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 31.99
- Reference cycles: 20.67
- UOPS_EXECUTED.THREAD: 32.01
- RETIRE_SLOTS: 32.0
- UOPS_MITE: 32.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 32.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3
  18:	62 f2 7d 49 63 e4    	vpcompressb zmm4{k1},zmm4
  1e:	62 f2 7d 49 63 ed    	vpcompressb zmm5{k1},zmm5
  24:	62 f2 7d 49 63 f6    	vpcompressb zmm6{k1},zmm6
  2a:	62 f2 7d 49 63 ff    	vpcompressb zmm7{k1},zmm7
  30:	62 52 7d 49 63 c0    	vpcompressb zmm8{k1},zmm8
  36:	62 52 7d 49 63 c9    	vpcompressb zmm9{k1},zmm9
  3c:	62 52 7d 49 63 d2    	vpcompressb zmm10{k1},zmm10
  42:	62 52 7d 49 63 db    	vpcompressb zmm11{k1},zmm11
  48:	62 52 7d 49 63 e4    	vpcompressb zmm12{k1},zmm12
  4e:	62 a2 7d 49 63 c0    	vpcompressb zmm16{k1},zmm16
  54:	62 a2 7d 49 63 c9    	vpcompressb zmm17{k1},zmm17
  5a:	62 a2 7d 49 63 d2    	vpcompressb zmm18{k1},zmm18

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 32.01
- Reference cycles: 19.44
- UOPS_EXECUTED.THREAD: 33.0
- RETIRE_SLOTS: 33.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 32.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 7d 49 63 c0    	vpcompressb zmm0{k1},zmm0
   6:	62 f2 7d 49 63 c9    	vpcompressb zmm1{k1},zmm1
   c:	62 f2 7d 49 63 d2    	vpcompressb zmm2{k1},zmm2
  12:	62 f2 7d 49 63 db    	vpcompressb zmm3{k1},zmm3
  18:	62 f2 7d 49 63 e4    	vpcompressb zmm4{k1},zmm4
  1e:	62 f2 7d 49 63 ed    	vpcompressb zmm5{k1},zmm5
  24:	62 f2 7d 49 63 f6    	vpcompressb zmm6{k1},zmm6
  2a:	62 f2 7d 49 63 ff    	vpcompressb zmm7{k1},zmm7
  30:	62 52 7d 49 63 c0    	vpcompressb zmm8{k1},zmm8
  36:	62 52 7d 49 63 c9    	vpcompressb zmm9{k1},zmm9
  3c:	62 52 7d 49 63 d2    	vpcompressb zmm10{k1},zmm10
  42:	62 52 7d 49 63 db    	vpcompressb zmm11{k1},zmm11
  48:	62 52 7d 49 63 e4    	vpcompressb zmm12{k1},zmm12
  4e:	62 a2 7d 49 63 c0    	vpcompressb zmm16{k1},zmm16
  54:	62 a2 7d 49 63 c9    	vpcompressb zmm17{k1},zmm17
  5a:	62 a2 7d 49 63 d2    	vpcompressb zmm18{k1},zmm18

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 32.01
- Reference cycles: 19.41
- UOPS_EXECUTED.THREAD: 32.1
- RETIRE_SLOTS: 32.1
- UOPS_MITE: 0.32
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 32.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.17

VPCOMPRESSB (ZMM, K, ZMM) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With unroll_count=500, no inner loop, and 1 NOP

With unroll_count=500, no inner loop, and 2 NOPs

With unroll_count=500, no inner loop, and 3 NOPs

With unroll_count=500, no inner loop, and 4 NOPs

With unroll_count=500, no inner loop, and 5 NOPs

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With unroll_count=500, no inner loop, and 1 NOP

With unroll_count=500, no inner loop, and 2 NOPs

With unroll_count=500, no inner loop, and 3 NOPs

With unroll_count=500, no inner loop, and 4 NOPs

With unroll_count=500, no inner loop, and 5 NOPs

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10