XOR_31 (R16, R16)

With unroll_count=500 and no inner loop

Code:

   0:	66 45 33 c1          	xor    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 0.99
- RS_UOPS_DISPATCHED: 1.0
- UOPS_PORT_0: 0.34
- UOPS_PORT_1: 0.34
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.33

With loop_count=1000 and unroll_count=10

Code:

   0:	66 45 33 c1          	xor    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.05
- Reference cycles: 1.05
- RS_UOPS_DISPATCHED: 1.2
- UOPS_PORT_0: 0.41
- UOPS_PORT_1: 0.34
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.44

With loop_count=100 and unroll_count=100

Code:

   0:	66 45 33 c1          	xor    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 1.0
- RS_UOPS_DISPATCHED: 1.02
- UOPS_PORT_0: 0.34
- UOPS_PORT_1: 0.34
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.34

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 1.33
- Reference cycles: 1.31
- RS_UOPS_DISPATCHED: 4.0
- UOPS_PORT_0: 1.33
- UOPS_PORT_1: 1.34
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.34

With loop_count=1000 and unroll_count=2

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 1.83
- Reference cycles: 1.83
- RS_UOPS_DISPATCHED: 5.01
- UOPS_PORT_0: 1.61
- UOPS_PORT_1: 1.65
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.75

With loop_count=100 and unroll_count=20

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 1.46
- Reference cycles: 1.45
- RS_UOPS_DISPATCHED: 4.11
- UOPS_PORT_0: 1.34
- UOPS_PORT_1: 1.37
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.4

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w
  10:	66 45 33 e9          	xor    r13w,r9w
  14:	66 45 33 f1          	xor    r14w,r9w
  18:	66 41 33 d9          	xor    bx,r9w
  1c:	66 41 33 c9          	xor    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 7.97
- RS_UOPS_DISPATCHED: 8.0
- UOPS_PORT_0: 2.64
- UOPS_PORT_1: 2.68
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.68

With loop_count=1000 and unroll_count=1

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w
  10:	66 45 33 e9          	xor    r13w,r9w
  14:	66 45 33 f1          	xor    r14w,r9w
  18:	66 41 33 d9          	xor    bx,r9w
  1c:	66 41 33 c9          	xor    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 9.01
- Reference cycles: 9.01
- RS_UOPS_DISPATCHED: 10.0
- UOPS_PORT_0: 3.0
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0

With loop_count=100 and unroll_count=10

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w
  10:	66 45 33 e9          	xor    r13w,r9w
  14:	66 45 33 f1          	xor    r14w,r9w
  18:	66 41 33 d9          	xor    bx,r9w
  1c:	66 41 33 c9          	xor    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.12
- Reference cycles: 8.11
- RS_UOPS_DISPATCHED: 8.2
- UOPS_PORT_0: 2.7
- UOPS_PORT_1: 2.7
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.8

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w
  10:	66 45 33 e9          	xor    r13w,r9w
  14:	66 45 33 f1          	xor    r14w,r9w
  18:	66 41 33 d9          	xor    bx,r9w
  1c:	66 41 33 c9          	xor    cx,r9w
  20:	66 41 33 d1          	xor    dx,r9w
  24:	66 41 33 f9          	xor    di,r9w
  28:	66 41 33 f1          	xor    si,r9w
  2c:	66 41 33 e9          	xor    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 12.0
- Reference cycles: 11.99
- RS_UOPS_DISPATCHED: 12.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 6.0

With loop_count=1000 and unroll_count=1

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w
  10:	66 45 33 e9          	xor    r13w,r9w
  14:	66 45 33 f1          	xor    r14w,r9w
  18:	66 41 33 d9          	xor    bx,r9w
  1c:	66 41 33 c9          	xor    cx,r9w
  20:	66 41 33 d1          	xor    dx,r9w
  24:	66 41 33 f9          	xor    di,r9w
  28:	66 41 33 f1          	xor    si,r9w
  2c:	66 41 33 e9          	xor    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 13.01
- Reference cycles: 13.01
- RS_UOPS_DISPATCHED: 14.0
- UOPS_PORT_0: 4.01
- UOPS_PORT_1: 5.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 5.0

With loop_count=100 and unroll_count=10

Code:

   0:	66 45 33 c1          	xor    r8w,r9w
   4:	66 45 33 d1          	xor    r10w,r9w
   8:	66 45 33 d9          	xor    r11w,r9w
   c:	66 45 33 e1          	xor    r12w,r9w
  10:	66 45 33 e9          	xor    r13w,r9w
  14:	66 45 33 f1          	xor    r14w,r9w
  18:	66 41 33 d9          	xor    bx,r9w
  1c:	66 41 33 c9          	xor    cx,r9w
  20:	66 41 33 d1          	xor    dx,r9w
  24:	66 41 33 f9          	xor    di,r9w
  28:	66 41 33 f1          	xor    si,r9w
  2c:	66 41 33 e9          	xor    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 12.11
- Reference cycles: 12.11
- RS_UOPS_DISPATCHED: 12.2
- UOPS_PORT_0: 0.41
- UOPS_PORT_1: 5.95
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 5.85

With the same register for for different operands

With unroll_count=500 and no inner loop

Code:

   0:	66 45 33 c0          	xor    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.34
- Reference cycles: 0.35
- RS_UOPS_DISPATCHED: 1.0
- UOPS_PORT_0: 0.34
- UOPS_PORT_1: 0.34
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.33

With loop_count=1000 and unroll_count=10

Code:

   0:	66 45 33 c0          	xor    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 0.4
- Reference cycles: 0.4
- RS_UOPS_DISPATCHED: 1.2
- UOPS_PORT_0: 0.4
- UOPS_PORT_1: 0.4
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.4

With loop_count=100 and unroll_count=100

Code:

   0:	66 45 33 c0          	xor    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 0.34
- Reference cycles: 0.34
- RS_UOPS_DISPATCHED: 1.02
- UOPS_PORT_0: 0.34
- UOPS_PORT_1: 0.34
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.34

XOR_31 (R16, R16) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 12 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100