VPERMB (ZMM, ZMM, M512) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.71
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.0
  • Reference cycles: 0.64
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.25
  • Reference cycles: 0.95
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 2.0
  • Reference cycles: 1.38
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.71
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.0
  • Reference cycles: 0.71
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.0
  • Reference cycles: 2.76
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.01
  • UOPS_PORT_2: 2.0
  • UOPS_PORT_3: 2.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.01
  • Reference cycles: 2.87
  • UOPS_EXECUTED.THREAD: 8.5
  • RETIRE_SLOTS: 8.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 2.0
  • UOPS_PORT_3: 2.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.01
  • Reference cycles: 2.79
  • UOPS_EXECUTED.THREAD: 8.05
  • RETIRE_SLOTS: 8.05
  • UOPS_MITE: 0.09
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 2.0
  • UOPS_PORT_3: 2.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
    1b:	62 d2 75 48 8d 6e 04 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+0x100]
    22:	62 d2 75 48 8d 76 05 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+0x140]
    29:	62 d2 75 48 8d 7e 06 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+0x180]
    30:	62 52 75 48 8d 46 07 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+0x1c0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 5.37
  • UOPS_EXECUTED.THREAD: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 16.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 4.0
  • UOPS_PORT_3: 4.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
    1b:	62 d2 75 48 8d 6e 04 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+0x100]
    22:	62 d2 75 48 8d 76 05 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+0x140]
    29:	62 d2 75 48 8d 7e 06 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+0x180]
    30:	62 52 75 48 8d 46 07 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+0x1c0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.01
  • Reference cycles: 5.54
  • UOPS_EXECUTED.THREAD: 17.01
  • RETIRE_SLOTS: 17.0
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 4.0
  • UOPS_PORT_3: 4.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
    1b:	62 d2 75 48 8d 6e 04 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+0x100]
    22:	62 d2 75 48 8d 76 05 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+0x140]
    29:	62 d2 75 48 8d 7e 06 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+0x180]
    30:	62 52 75 48 8d 46 07 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+0x1c0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.01
  • Reference cycles: 5.6
  • UOPS_EXECUTED.THREAD: 16.11
  • RETIRE_SLOTS: 16.1
  • UOPS_MITE: 0.16
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 4.0
  • UOPS_PORT_3: 4.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With unroll_count=100 and no inner loop

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
    1b:	62 d2 75 48 8d 6e 04 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+0x100]
    22:	62 d2 75 48 8d 76 05 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+0x140]
    29:	62 d2 75 48 8d 7e 06 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+0x180]
    30:	62 52 75 48 8d 46 07 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+0x1c0]
    37:	62 52 75 48 8d 4e 08 	vpermb zmm9,zmm1,ZMMWORD PTR [r14+0x200]
    3e:	62 52 75 48 8d 56 09 	vpermb zmm10,zmm1,ZMMWORD PTR [r14+0x240]
    45:	62 52 75 48 8d 5e 0a 	vpermb zmm11,zmm1,ZMMWORD PTR [r14+0x280]
    4c:	62 52 75 48 8d 66 0b 	vpermb zmm12,zmm1,ZMMWORD PTR [r14+0x2c0]
    53:	62 c2 75 48 8d 46 0c 	vpermb zmm16,zmm1,ZMMWORD PTR [r14+0x300]
    5a:	62 c2 75 48 8d 4e 0d 	vpermb zmm17,zmm1,ZMMWORD PTR [r14+0x340]
    61:	62 c2 75 48 8d 56 0e 	vpermb zmm18,zmm1,ZMMWORD PTR [r14+0x380]
    68:	62 c2 75 48 8d 5e 0f 	vpermb zmm19,zmm1,ZMMWORD PTR [r14+0x3c0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 16.0
  • Reference cycles: 11.35
  • UOPS_EXECUTED.THREAD: 32.0
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 32.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 16.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
    1b:	62 d2 75 48 8d 6e 04 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+0x100]
    22:	62 d2 75 48 8d 76 05 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+0x140]
    29:	62 d2 75 48 8d 7e 06 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+0x180]
    30:	62 52 75 48 8d 46 07 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+0x1c0]
    37:	62 52 75 48 8d 4e 08 	vpermb zmm9,zmm1,ZMMWORD PTR [r14+0x200]
    3e:	62 52 75 48 8d 56 09 	vpermb zmm10,zmm1,ZMMWORD PTR [r14+0x240]
    45:	62 52 75 48 8d 5e 0a 	vpermb zmm11,zmm1,ZMMWORD PTR [r14+0x280]
    4c:	62 52 75 48 8d 66 0b 	vpermb zmm12,zmm1,ZMMWORD PTR [r14+0x2c0]
    53:	62 c2 75 48 8d 46 0c 	vpermb zmm16,zmm1,ZMMWORD PTR [r14+0x300]
    5a:	62 c2 75 48 8d 4e 0d 	vpermb zmm17,zmm1,ZMMWORD PTR [r14+0x340]
    61:	62 c2 75 48 8d 56 0e 	vpermb zmm18,zmm1,ZMMWORD PTR [r14+0x380]
    68:	62 c2 75 48 8d 5e 0f 	vpermb zmm19,zmm1,ZMMWORD PTR [r14+0x3c0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 16.02
  • Reference cycles: 11.1
  • UOPS_EXECUTED.THREAD: 33.0
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 16.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02

With loop_count=100 and unroll_count=10

• Code:

     0:	62 d2 75 48 8d 06    	vpermb zmm0,zmm1,ZMMWORD PTR [r14]
     6:	62 d2 75 48 8d 56 01 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+0x40]
     d:	62 d2 75 48 8d 5e 02 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+0x80]
    14:	62 d2 75 48 8d 66 03 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+0xc0]
    1b:	62 d2 75 48 8d 6e 04 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+0x100]
    22:	62 d2 75 48 8d 76 05 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+0x140]
    29:	62 d2 75 48 8d 7e 06 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+0x180]
    30:	62 52 75 48 8d 46 07 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+0x1c0]
    37:	62 52 75 48 8d 4e 08 	vpermb zmm9,zmm1,ZMMWORD PTR [r14+0x200]
    3e:	62 52 75 48 8d 56 09 	vpermb zmm10,zmm1,ZMMWORD PTR [r14+0x240]
    45:	62 52 75 48 8d 5e 0a 	vpermb zmm11,zmm1,ZMMWORD PTR [r14+0x280]
    4c:	62 52 75 48 8d 66 0b 	vpermb zmm12,zmm1,ZMMWORD PTR [r14+0x2c0]
    53:	62 c2 75 48 8d 46 0c 	vpermb zmm16,zmm1,ZMMWORD PTR [r14+0x300]
    5a:	62 c2 75 48 8d 4e 0d 	vpermb zmm17,zmm1,ZMMWORD PTR [r14+0x340]
    61:	62 c2 75 48 8d 56 0e 	vpermb zmm18,zmm1,ZMMWORD PTR [r14+0x380]
    68:	62 c2 75 48 8d 5e 0f 	vpermb zmm19,zmm1,ZMMWORD PTR [r14+0x3c0]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 16.01
  • Reference cycles: 11.1
  • UOPS_EXECUTED.THREAD: 32.11
  • RETIRE_SLOTS: 32.1
  • UOPS_MITE: 0.32
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 16.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.16

With unroll_count=500 and no inner loop

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.64
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.71
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.0
  • Reference cycles: 0.64
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.25
  • Reference cycles: 0.8
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
     a:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 2.0
  • Reference cycles: 1.41
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.71
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.0
  • Reference cycles: 0.71
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.5
  • UOPS_PORT_3: 0.5
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.0
  • Reference cycles: 2.76
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 2.0
  • UOPS_PORT_3: 2.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.01
  • Reference cycles: 2.86
  • UOPS_EXECUTED.THREAD: 8.5
  • RETIRE_SLOTS: 8.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 2.0
  • UOPS_PORT_3: 2.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.01
  • Reference cycles: 2.87
  • UOPS_EXECUTED.THREAD: 8.05
  • RETIRE_SLOTS: 8.05
  • UOPS_MITE: 0.08
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 2.0
  • UOPS_PORT_3: 2.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
    1f:	62 92 75 48 8d 6c 2e 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+r13*1+0x100]
    26:	04 
    27:	62 92 75 48 8d 74 2e 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+r13*1+0x140]
    2e:	05 
    2f:	62 92 75 48 8d 7c 2e 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+r13*1+0x180]
    36:	06 
    37:	62 12 75 48 8d 44 2e 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+r13*1+0x1c0]
    3e:	07 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 5.52
  • UOPS_EXECUTED.THREAD: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 16.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 4.0
  • UOPS_PORT_3: 4.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
    1f:	62 92 75 48 8d 6c 2e 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+r13*1+0x100]
    26:	04 
    27:	62 92 75 48 8d 74 2e 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+r13*1+0x140]
    2e:	05 
    2f:	62 92 75 48 8d 7c 2e 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+r13*1+0x180]
    36:	06 
    37:	62 12 75 48 8d 44 2e 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+r13*1+0x1c0]
    3e:	07 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.01
  • Reference cycles: 5.7
  • UOPS_EXECUTED.THREAD: 17.01
  • RETIRE_SLOTS: 17.0
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 4.0
  • UOPS_PORT_3: 4.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
    1f:	62 92 75 48 8d 6c 2e 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+r13*1+0x100]
    26:	04 
    27:	62 92 75 48 8d 74 2e 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+r13*1+0x140]
    2e:	05 
    2f:	62 92 75 48 8d 7c 2e 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+r13*1+0x180]
    36:	06 
    37:	62 12 75 48 8d 44 2e 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+r13*1+0x1c0]
    3e:	07 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.02
  • Reference cycles: 5.73
  • UOPS_EXECUTED.THREAD: 16.11
  • RETIRE_SLOTS: 16.1
  • UOPS_MITE: 0.16
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 4.0
  • UOPS_PORT_3: 4.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With unroll_count=100 and no inner loop

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
    1f:	62 92 75 48 8d 6c 2e 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+r13*1+0x100]
    26:	04 
    27:	62 92 75 48 8d 74 2e 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+r13*1+0x140]
    2e:	05 
    2f:	62 92 75 48 8d 7c 2e 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+r13*1+0x180]
    36:	06 
    37:	62 12 75 48 8d 44 2e 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+r13*1+0x1c0]
    3e:	07 
    3f:	62 12 75 48 8d 4c 2e 	vpermb zmm9,zmm1,ZMMWORD PTR [r14+r13*1+0x200]
    46:	08 
    47:	62 12 75 48 8d 54 2e 	vpermb zmm10,zmm1,ZMMWORD PTR [r14+r13*1+0x240]
    4e:	09 
    4f:	62 12 75 48 8d 5c 2e 	vpermb zmm11,zmm1,ZMMWORD PTR [r14+r13*1+0x280]
    56:	0a 
    57:	62 12 75 48 8d 64 2e 	vpermb zmm12,zmm1,ZMMWORD PTR [r14+r13*1+0x2c0]
    5e:	0b 
    5f:	62 82 75 48 8d 44 2e 	vpermb zmm16,zmm1,ZMMWORD PTR [r14+r13*1+0x300]
    66:	0c 
    67:	62 82 75 48 8d 4c 2e 	vpermb zmm17,zmm1,ZMMWORD PTR [r14+r13*1+0x340]
    6e:	0d 
    6f:	62 82 75 48 8d 54 2e 	vpermb zmm18,zmm1,ZMMWORD PTR [r14+r13*1+0x380]
    76:	0e 
    77:	62 82 75 48 8d 5c 2e 	vpermb zmm19,zmm1,ZMMWORD PTR [r14+r13*1+0x3c0]
    7e:	0f 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 16.0
  • Reference cycles: 11.04
  • UOPS_EXECUTED.THREAD: 32.0
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 32.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 16.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
    1f:	62 92 75 48 8d 6c 2e 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+r13*1+0x100]
    26:	04 
    27:	62 92 75 48 8d 74 2e 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+r13*1+0x140]
    2e:	05 
    2f:	62 92 75 48 8d 7c 2e 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+r13*1+0x180]
    36:	06 
    37:	62 12 75 48 8d 44 2e 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+r13*1+0x1c0]
    3e:	07 
    3f:	62 12 75 48 8d 4c 2e 	vpermb zmm9,zmm1,ZMMWORD PTR [r14+r13*1+0x200]
    46:	08 
    47:	62 12 75 48 8d 54 2e 	vpermb zmm10,zmm1,ZMMWORD PTR [r14+r13*1+0x240]
    4e:	09 
    4f:	62 12 75 48 8d 5c 2e 	vpermb zmm11,zmm1,ZMMWORD PTR [r14+r13*1+0x280]
    56:	0a 
    57:	62 12 75 48 8d 64 2e 	vpermb zmm12,zmm1,ZMMWORD PTR [r14+r13*1+0x2c0]
    5e:	0b 
    5f:	62 82 75 48 8d 44 2e 	vpermb zmm16,zmm1,ZMMWORD PTR [r14+r13*1+0x300]
    66:	0c 
    67:	62 82 75 48 8d 4c 2e 	vpermb zmm17,zmm1,ZMMWORD PTR [r14+r13*1+0x340]
    6e:	0d 
    6f:	62 82 75 48 8d 54 2e 	vpermb zmm18,zmm1,ZMMWORD PTR [r14+r13*1+0x380]
    76:	0e 
    77:	62 82 75 48 8d 5c 2e 	vpermb zmm19,zmm1,ZMMWORD PTR [r14+r13*1+0x3c0]
    7e:	0f 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 16.02
  • Reference cycles: 11.07
  • UOPS_EXECUTED.THREAD: 33.01
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 16.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02

With loop_count=100 and unroll_count=10

• Code:

     0:	62 92 75 48 8d 04 2e 	vpermb zmm0,zmm1,ZMMWORD PTR [r14+r13*1]
     7:	62 92 75 48 8d 54 2e 	vpermb zmm2,zmm1,ZMMWORD PTR [r14+r13*1+0x40]
     e:	01 
     f:	62 92 75 48 8d 5c 2e 	vpermb zmm3,zmm1,ZMMWORD PTR [r14+r13*1+0x80]
    16:	02 
    17:	62 92 75 48 8d 64 2e 	vpermb zmm4,zmm1,ZMMWORD PTR [r14+r13*1+0xc0]
    1e:	03 
    1f:	62 92 75 48 8d 6c 2e 	vpermb zmm5,zmm1,ZMMWORD PTR [r14+r13*1+0x100]
    26:	04 
    27:	62 92 75 48 8d 74 2e 	vpermb zmm6,zmm1,ZMMWORD PTR [r14+r13*1+0x140]
    2e:	05 
    2f:	62 92 75 48 8d 7c 2e 	vpermb zmm7,zmm1,ZMMWORD PTR [r14+r13*1+0x180]
    36:	06 
    37:	62 12 75 48 8d 44 2e 	vpermb zmm8,zmm1,ZMMWORD PTR [r14+r13*1+0x1c0]
    3e:	07 
    3f:	62 12 75 48 8d 4c 2e 	vpermb zmm9,zmm1,ZMMWORD PTR [r14+r13*1+0x200]
    46:	08 
    47:	62 12 75 48 8d 54 2e 	vpermb zmm10,zmm1,ZMMWORD PTR [r14+r13*1+0x240]
    4e:	09 
    4f:	62 12 75 48 8d 5c 2e 	vpermb zmm11,zmm1,ZMMWORD PTR [r14+r13*1+0x280]
    56:	0a 
    57:	62 12 75 48 8d 64 2e 	vpermb zmm12,zmm1,ZMMWORD PTR [r14+r13*1+0x2c0]
    5e:	0b 
    5f:	62 82 75 48 8d 44 2e 	vpermb zmm16,zmm1,ZMMWORD PTR [r14+r13*1+0x300]
    66:	0c 
    67:	62 82 75 48 8d 4c 2e 	vpermb zmm17,zmm1,ZMMWORD PTR [r14+r13*1+0x340]
    6e:	0d 
    6f:	62 82 75 48 8d 54 2e 	vpermb zmm18,zmm1,ZMMWORD PTR [r14+r13*1+0x380]
    76:	0e 
    77:	62 82 75 48 8d 5c 2e 	vpermb zmm19,zmm1,ZMMWORD PTR [r14+r13*1+0x3c0]
    7e:	0f 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 16.02
  • Reference cycles: 11.1
  • UOPS_EXECUTED.THREAD: 32.11
  • RETIRE_SLOTS: 32.1
  • UOPS_MITE: 0.32
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 16.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.16