VPBROADCASTW (YMM, XMM)

With unroll_count=500 and no inner loop

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 0.77
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 0.74
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 0.74
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 3.07
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 2.94
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 2.94
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1
  14:	c4 e2 7d 79 e9       	vpbroadcastw ymm5,xmm1
  19:	c4 e2 7d 79 f1       	vpbroadcastw ymm6,xmm1
  1e:	c4 e2 7d 79 f9       	vpbroadcastw ymm7,xmm1
  23:	c4 62 7d 79 c1       	vpbroadcastw ymm8,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 6.29
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1
  14:	c4 e2 7d 79 e9       	vpbroadcastw ymm5,xmm1
  19:	c4 e2 7d 79 f1       	vpbroadcastw ymm6,xmm1
  1e:	c4 e2 7d 79 f9       	vpbroadcastw ymm7,xmm1
  23:	c4 62 7d 79 c1       	vpbroadcastw ymm8,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 5.89
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1
  14:	c4 e2 7d 79 e9       	vpbroadcastw ymm5,xmm1
  19:	c4 e2 7d 79 f1       	vpbroadcastw ymm6,xmm1
  1e:	c4 e2 7d 79 f9       	vpbroadcastw ymm7,xmm1
  23:	c4 62 7d 79 c1       	vpbroadcastw ymm8,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 5.9
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1
  14:	c4 e2 7d 79 e9       	vpbroadcastw ymm5,xmm1
  19:	c4 e2 7d 79 f1       	vpbroadcastw ymm6,xmm1
  1e:	c4 e2 7d 79 f9       	vpbroadcastw ymm7,xmm1
  23:	c4 62 7d 79 c1       	vpbroadcastw ymm8,xmm1
  28:	c4 62 7d 79 c9       	vpbroadcastw ymm9,xmm1
  2d:	c4 62 7d 79 d1       	vpbroadcastw ymm10,xmm1
  32:	c4 62 7d 79 d9       	vpbroadcastw ymm11,xmm1
  37:	c4 62 7d 79 e1       	vpbroadcastw ymm12,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 12.0
- Reference cycles: 8.89
- UOPS_EXECUTED.THREAD: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MITE: 12.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 12.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1
  14:	c4 e2 7d 79 e9       	vpbroadcastw ymm5,xmm1
  19:	c4 e2 7d 79 f1       	vpbroadcastw ymm6,xmm1
  1e:	c4 e2 7d 79 f9       	vpbroadcastw ymm7,xmm1
  23:	c4 62 7d 79 c1       	vpbroadcastw ymm8,xmm1
  28:	c4 62 7d 79 c9       	vpbroadcastw ymm9,xmm1
  2d:	c4 62 7d 79 d1       	vpbroadcastw ymm10,xmm1
  32:	c4 62 7d 79 d9       	vpbroadcastw ymm11,xmm1
  37:	c4 62 7d 79 e1       	vpbroadcastw ymm12,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 12.01
- Reference cycles: 8.86
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 12.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 e2 7d 79 c1       	vpbroadcastw ymm0,xmm1
   5:	c4 e2 7d 79 d1       	vpbroadcastw ymm2,xmm1
   a:	c4 e2 7d 79 d9       	vpbroadcastw ymm3,xmm1
   f:	c4 e2 7d 79 e1       	vpbroadcastw ymm4,xmm1
  14:	c4 e2 7d 79 e9       	vpbroadcastw ymm5,xmm1
  19:	c4 e2 7d 79 f1       	vpbroadcastw ymm6,xmm1
  1e:	c4 e2 7d 79 f9       	vpbroadcastw ymm7,xmm1
  23:	c4 62 7d 79 c1       	vpbroadcastw ymm8,xmm1
  28:	c4 62 7d 79 c9       	vpbroadcastw ymm9,xmm1
  2d:	c4 62 7d 79 d1       	vpbroadcastw ymm10,xmm1
  32:	c4 62 7d 79 d9       	vpbroadcastw ymm11,xmm1
  37:	c4 62 7d 79 e1       	vpbroadcastw ymm12,xmm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 12.01
- Reference cycles: 8.85
- UOPS_EXECUTED.THREAD: 12.1
- RETIRE_SLOTS: 12.1
- UOPS_MITE: 0.12
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 12.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 2.18
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 3.0
- Reference cycles: 2.14
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 3.0
- Reference cycles: 2.14
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.04
- Reference cycles: 2.99
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 2.85
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 2.85
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3
  14:	c4 e2 7d 79 e4       	vpbroadcastw ymm4,xmm4
  19:	c4 e2 7d 79 ed       	vpbroadcastw ymm5,xmm5
  1e:	c4 e2 7d 79 f6       	vpbroadcastw ymm6,xmm6
  23:	c4 e2 7d 79 ff       	vpbroadcastw ymm7,xmm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
VXORPS XMM5, XMM5, XMM5;
VXORPS XMM6, XMM6, XMM6;
VXORPS XMM7, XMM7, XMM7

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 5.52
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3
  14:	c4 e2 7d 79 e4       	vpbroadcastw ymm4,xmm4
  19:	c4 e2 7d 79 ed       	vpbroadcastw ymm5,xmm5
  1e:	c4 e2 7d 79 f6       	vpbroadcastw ymm6,xmm6
  23:	c4 e2 7d 79 ff       	vpbroadcastw ymm7,xmm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
VXORPS XMM5, XMM5, XMM5;
VXORPS XMM6, XMM6, XMM6;
VXORPS XMM7, XMM7, XMM7

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 5.7
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3
  14:	c4 e2 7d 79 e4       	vpbroadcastw ymm4,xmm4
  19:	c4 e2 7d 79 ed       	vpbroadcastw ymm5,xmm5
  1e:	c4 e2 7d 79 f6       	vpbroadcastw ymm6,xmm6
  23:	c4 e2 7d 79 ff       	vpbroadcastw ymm7,xmm7

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
VXORPS XMM5, XMM5, XMM5;
VXORPS XMM6, XMM6, XMM6;
VXORPS XMM7, XMM7, XMM7

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 5.77
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3
  14:	c4 e2 7d 79 e4       	vpbroadcastw ymm4,xmm4
  19:	c4 e2 7d 79 ed       	vpbroadcastw ymm5,xmm5
  1e:	c4 e2 7d 79 f6       	vpbroadcastw ymm6,xmm6
  23:	c4 e2 7d 79 ff       	vpbroadcastw ymm7,xmm7
  28:	c4 42 7d 79 c0       	vpbroadcastw ymm8,xmm8
  2d:	c4 42 7d 79 c9       	vpbroadcastw ymm9,xmm9
  32:	c4 42 7d 79 d2       	vpbroadcastw ymm10,xmm10
  37:	c4 42 7d 79 db       	vpbroadcastw ymm11,xmm11
  3c:	c4 42 7d 79 e4       	vpbroadcastw ymm12,xmm12

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
VXORPS XMM5, XMM5, XMM5;
VXORPS XMM6, XMM6, XMM6;
VXORPS XMM7, XMM7, XMM7;
VXORPS XMM8, XMM8, XMM8;
VXORPS XMM9, XMM9, XMM9;
VXORPS XMM10, XMM10, XMM10;
VXORPS XMM11, XMM11, XMM11;
VXORPS XMM12, XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.0
- Reference cycles: 9.2
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 13.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.25

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3
  14:	c4 e2 7d 79 e4       	vpbroadcastw ymm4,xmm4
  19:	c4 e2 7d 79 ed       	vpbroadcastw ymm5,xmm5
  1e:	c4 e2 7d 79 f6       	vpbroadcastw ymm6,xmm6
  23:	c4 e2 7d 79 ff       	vpbroadcastw ymm7,xmm7
  28:	c4 42 7d 79 c0       	vpbroadcastw ymm8,xmm8
  2d:	c4 42 7d 79 c9       	vpbroadcastw ymm9,xmm9
  32:	c4 42 7d 79 d2       	vpbroadcastw ymm10,xmm10
  37:	c4 42 7d 79 db       	vpbroadcastw ymm11,xmm11
  3c:	c4 42 7d 79 e4       	vpbroadcastw ymm12,xmm12

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
VXORPS XMM5, XMM5, XMM5;
VXORPS XMM6, XMM6, XMM6;
VXORPS XMM7, XMM7, XMM7;
VXORPS XMM8, XMM8, XMM8;
VXORPS XMM9, XMM9, XMM9;
VXORPS XMM10, XMM10, XMM10;
VXORPS XMM11, XMM11, XMM11;
VXORPS XMM12, XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 13.01
- Reference cycles: 9.34
- UOPS_EXECUTED.THREAD: 14.0
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 13.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	c4 e2 7d 79 c0       	vpbroadcastw ymm0,xmm0
   5:	c4 e2 7d 79 c9       	vpbroadcastw ymm1,xmm1
   a:	c4 e2 7d 79 d2       	vpbroadcastw ymm2,xmm2
   f:	c4 e2 7d 79 db       	vpbroadcastw ymm3,xmm3
  14:	c4 e2 7d 79 e4       	vpbroadcastw ymm4,xmm4
  19:	c4 e2 7d 79 ed       	vpbroadcastw ymm5,xmm5
  1e:	c4 e2 7d 79 f6       	vpbroadcastw ymm6,xmm6
  23:	c4 e2 7d 79 ff       	vpbroadcastw ymm7,xmm7
  28:	c4 42 7d 79 c0       	vpbroadcastw ymm8,xmm8
  2d:	c4 42 7d 79 c9       	vpbroadcastw ymm9,xmm9
  32:	c4 42 7d 79 d2       	vpbroadcastw ymm10,xmm10
  37:	c4 42 7d 79 db       	vpbroadcastw ymm11,xmm11
  3c:	c4 42 7d 79 e4       	vpbroadcastw ymm12,xmm12

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM0, XMM0, XMM0;
VXORPS XMM1, XMM1, XMM1;
VXORPS XMM2, XMM2, XMM2;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
VXORPS XMM5, XMM5, XMM5;
VXORPS XMM6, XMM6, XMM6;
VXORPS XMM7, XMM7, XMM7;
VXORPS XMM8, XMM8, XMM8;
VXORPS XMM9, XMM9, XMM9;
VXORPS XMM10, XMM10, XMM10;
VXORPS XMM11, XMM11, XMM11;
VXORPS XMM12, XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 13.01
- Reference cycles: 9.31
- UOPS_EXECUTED.THREAD: 13.1
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.13
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 13.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

VPBROADCASTW (YMM, XMM) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 12 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10