VMOVD (XMM, R32)

With unroll_count=500 and no inner loop

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 0.83
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 0.69
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 0.69
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 3.99
- Reference cycles: 2.68
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.0
- Reference cycles: 2.77
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 2.78
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d
  14:	c4 c1 79 6e e0       	vmovd  xmm4,r8d
  19:	c4 c1 79 6e e8       	vmovd  xmm5,r8d
  1e:	c4 c1 79 6e f0       	vmovd  xmm6,r8d
  23:	c4 c1 79 6e f8       	vmovd  xmm7,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 5.37
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d
  14:	c4 c1 79 6e e0       	vmovd  xmm4,r8d
  19:	c4 c1 79 6e e8       	vmovd  xmm5,r8d
  1e:	c4 c1 79 6e f0       	vmovd  xmm6,r8d
  23:	c4 c1 79 6e f8       	vmovd  xmm7,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 5.55
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d
  14:	c4 c1 79 6e e0       	vmovd  xmm4,r8d
  19:	c4 c1 79 6e e8       	vmovd  xmm5,r8d
  1e:	c4 c1 79 6e f0       	vmovd  xmm6,r8d
  23:	c4 c1 79 6e f8       	vmovd  xmm7,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 5.57
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d
  14:	c4 c1 79 6e e0       	vmovd  xmm4,r8d
  19:	c4 c1 79 6e e8       	vmovd  xmm5,r8d
  1e:	c4 c1 79 6e f0       	vmovd  xmm6,r8d
  23:	c4 c1 79 6e f8       	vmovd  xmm7,r8d
  28:	c4 41 79 6e c0       	vmovd  xmm8,r8d
  2d:	c4 41 79 6e c8       	vmovd  xmm9,r8d
  32:	c4 41 79 6e d0       	vmovd  xmm10,r8d
  37:	c4 41 79 6e d8       	vmovd  xmm11,r8d
  3c:	c4 41 79 6e e0       	vmovd  xmm12,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.08
- Reference cycles: 8.89
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 13.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.25

With loop_count=1000 and unroll_count=1

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d
  14:	c4 c1 79 6e e0       	vmovd  xmm4,r8d
  19:	c4 c1 79 6e e8       	vmovd  xmm5,r8d
  1e:	c4 c1 79 6e f0       	vmovd  xmm6,r8d
  23:	c4 c1 79 6e f8       	vmovd  xmm7,r8d
  28:	c4 41 79 6e c0       	vmovd  xmm8,r8d
  2d:	c4 41 79 6e c8       	vmovd  xmm9,r8d
  32:	c4 41 79 6e d0       	vmovd  xmm10,r8d
  37:	c4 41 79 6e d8       	vmovd  xmm11,r8d
  3c:	c4 41 79 6e e0       	vmovd  xmm12,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 13.01
- Reference cycles: 9.0
- UOPS_EXECUTED.THREAD: 14.0
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 13.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	c4 c1 79 6e c0       	vmovd  xmm0,r8d
   5:	c4 c1 79 6e c8       	vmovd  xmm1,r8d
   a:	c4 c1 79 6e d0       	vmovd  xmm2,r8d
   f:	c4 c1 79 6e d8       	vmovd  xmm3,r8d
  14:	c4 c1 79 6e e0       	vmovd  xmm4,r8d
  19:	c4 c1 79 6e e8       	vmovd  xmm5,r8d
  1e:	c4 c1 79 6e f0       	vmovd  xmm6,r8d
  23:	c4 c1 79 6e f8       	vmovd  xmm7,r8d
  28:	c4 41 79 6e c0       	vmovd  xmm8,r8d
  2d:	c4 41 79 6e c8       	vmovd  xmm9,r8d
  32:	c4 41 79 6e d0       	vmovd  xmm10,r8d
  37:	c4 41 79 6e d8       	vmovd  xmm11,r8d
  3c:	c4 41 79 6e e0       	vmovd  xmm12,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 13.01
- Reference cycles: 8.95
- UOPS_EXECUTED.THREAD: 13.1
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.13
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 13.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

VMOVD (XMM, R32) - Throughput and Uops

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10