VGATHERDPS (ZMM, K, VSIB_ZMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 9.0
  • Reference cycles: 6.16
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 6.19
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 6.29
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 9.0
  • Reference cycles: 6.23
  • UOPS_EXECUTED.THREAD: 4.1
  • RETIRE_SLOTS: 4.1
  • UOPS_MITE: 4.11
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000, unroll_count=10, and padding (long NOPs)

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
     e:	0f 1f 84 00 00 00 00 
    15:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 9.0
  • Reference cycles: 6.22
  • UOPS_EXECUTED.THREAD: 4.1
  • RETIRE_SLOTS: 5.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 9.0
  • Reference cycles: 6.23
  • UOPS_EXECUTED.THREAD: 4.01
  • RETIRE_SLOTS: 4.01
  • UOPS_MITE: 4.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=100, unroll_count=100, and padding (long NOPs)

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
     e:	0f 1f 84 00 00 00 00 
    15:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 9.0
  • Reference cycles: 6.43
  • UOPS_EXECUTED.THREAD: 4.01
  • RETIRE_SLOTS: 5.01
  • UOPS_MITE: 0.05
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 8.0
  • UOPS_PORT_3: 8.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 36.0
  • Reference cycles: 25.45
  • UOPS_EXECUTED.THREAD: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 16.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 32.0
  • UOPS_PORT_3: 32.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 36.01
  • Reference cycles: 24.89
  • UOPS_EXECUTED.THREAD: 16.5
  • RETIRE_SLOTS: 16.5
  • UOPS_MITE: 16.53
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 32.0
  • UOPS_PORT_3: 32.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.01

With loop_count=1000, unroll_count=2, and padding (long NOPs)

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 36.02
  • Reference cycles: 24.9
  • UOPS_EXECUTED.THREAD: 16.5
  • RETIRE_SLOTS: 17.51
  • UOPS_MITE: 17.53
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 32.0
  • UOPS_PORT_3: 32.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.51

With loop_count=100 and unroll_count=20

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 36.02
  • Reference cycles: 24.9
  • UOPS_EXECUTED.THREAD: 16.05
  • RETIRE_SLOTS: 16.05
  • UOPS_MITE: 16.08
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 32.0
  • UOPS_PORT_3: 32.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.01

With loop_count=100, unroll_count=20, and padding (long NOPs)

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 36.02
  • Reference cycles: 24.9
  • UOPS_EXECUTED.THREAD: 16.05
  • RETIRE_SLOTS: 17.06
  • UOPS_MITE: 17.08
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 32.0
  • UOPS_PORT_3: 32.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.06

With unroll_count=100 and no inner loop

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
    1f:	62 92 7d 4d 92 64 36 	vgatherdps zmm4{k5},DWORD PTR [r14+zmm14*1+0x10]
    26:	04 
    27:	62 92 7d 4e 92 6c 36 	vgatherdps zmm5{k6},DWORD PTR [r14+zmm14*1+0x14]
    2e:	05 
    2f:	62 92 7d 4f 92 74 36 	vgatherdps zmm6{k7},DWORD PTR [r14+zmm14*1+0x18]
    36:	06 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX;
  VMOVUPD ZMM4, [R14];
  VMOVUPD ZMM5, [R14];
  MOV [R14+20], RAX;
  VMOVUPD ZMM6, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 7.0
  • Core cycles: 63.0
  • Reference cycles: 43.39
  • UOPS_EXECUTED.THREAD: 28.0
  • RETIRE_SLOTS: 28.0
  • UOPS_MITE: 28.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 7.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 56.0
  • UOPS_PORT_3: 56.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 7.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
    1f:	62 92 7d 4d 92 64 36 	vgatherdps zmm4{k5},DWORD PTR [r14+zmm14*1+0x10]
    26:	04 
    27:	62 92 7d 4e 92 6c 36 	vgatherdps zmm5{k6},DWORD PTR [r14+zmm14*1+0x14]
    2e:	05 
    2f:	62 92 7d 4f 92 74 36 	vgatherdps zmm6{k7},DWORD PTR [r14+zmm14*1+0x18]
    36:	06 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX;
  VMOVUPD ZMM4, [R14];
  VMOVUPD ZMM5, [R14];
  MOV [R14+20], RAX;
  VMOVUPD ZMM6, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 9.0
  • Core cycles: 63.03
  • Reference cycles: 43.58
  • UOPS_EXECUTED.THREAD: 29.0
  • RETIRE_SLOTS: 29.0
  • UOPS_MITE: 29.06
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 7.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 56.0
  • UOPS_PORT_3: 56.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 7.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.02

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
    2e:	62 92 7d 4d 92 64 36 	vgatherdps zmm4{k5},DWORD PTR [r14+zmm14*1+0x10]
    35:	04 
    36:	62 92 7d 4e 92 6c 36 	vgatherdps zmm5{k6},DWORD PTR [r14+zmm14*1+0x14]
    3d:	05 
    3e:	62 92 7d 4f 92 74 36 	vgatherdps zmm6{k7},DWORD PTR [r14+zmm14*1+0x18]
    45:	06 
    46:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    4d:	0f 1f 84 00 00 00 00 
    54:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX;
  VMOVUPD ZMM4, [R14];
  VMOVUPD ZMM5, [R14];
  MOV [R14+20], RAX;
  VMOVUPD ZMM6, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 63.03
  • Reference cycles: 43.56
  • UOPS_EXECUTED.THREAD: 29.0
  • RETIRE_SLOTS: 31.02
  • UOPS_MITE: 31.06
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 7.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 56.0
  • UOPS_PORT_3: 56.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 7.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.01

With loop_count=100 and unroll_count=10

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
    1f:	62 92 7d 4d 92 64 36 	vgatherdps zmm4{k5},DWORD PTR [r14+zmm14*1+0x10]
    26:	04 
    27:	62 92 7d 4e 92 6c 36 	vgatherdps zmm5{k6},DWORD PTR [r14+zmm14*1+0x14]
    2e:	05 
    2f:	62 92 7d 4f 92 74 36 	vgatherdps zmm6{k7},DWORD PTR [r14+zmm14*1+0x18]
    36:	06 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX;
  VMOVUPD ZMM4, [R14];
  VMOVUPD ZMM5, [R14];
  MOV [R14+20], RAX;
  VMOVUPD ZMM6, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 7.2
  • Core cycles: 63.03
  • Reference cycles: 43.59
  • UOPS_EXECUTED.THREAD: 28.1
  • RETIRE_SLOTS: 28.1
  • UOPS_MITE: 28.16
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 7.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 56.0
  • UOPS_PORT_3: 56.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 7.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.01

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	62 92 7d 49 92 04 36 	vgatherdps zmm0{k1},DWORD PTR [r14+zmm14*1]
     7:	62 92 7d 4a 92 4c 36 	vgatherdps zmm1{k2},DWORD PTR [r14+zmm14*1+0x4]
     e:	01 
     f:	62 92 7d 4b 92 54 36 	vgatherdps zmm2{k3},DWORD PTR [r14+zmm14*1+0x8]
    16:	02 
    17:	62 92 7d 4c 92 5c 36 	vgatherdps zmm3{k4},DWORD PTR [r14+zmm14*1+0xc]
    1e:	03 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
    2e:	62 92 7d 4d 92 64 36 	vgatherdps zmm4{k5},DWORD PTR [r14+zmm14*1+0x10]
    35:	04 
    36:	62 92 7d 4e 92 6c 36 	vgatherdps zmm5{k6},DWORD PTR [r14+zmm14*1+0x14]
    3d:	05 
    3e:	62 92 7d 4f 92 74 36 	vgatherdps zmm6{k7},DWORD PTR [r14+zmm14*1+0x18]
    45:	06 
    46:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    4d:	0f 1f 84 00 00 00 00 
    54:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS ZMM14, ZMM14, ZMM14;
  VMOVUPD ZMM1, [R14];
  MOV [R14+4], RAX;
  VMOVUPD ZMM2, [R14];
  VMOVUPD ZMM3, [R14];
  MOV [R14+12], RAX;
  VMOVUPD ZMM4, [R14];
  VMOVUPD ZMM5, [R14];
  MOV [R14+20], RAX;
  VMOVUPD ZMM6, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 9.2
  • Core cycles: 63.03
  • Reference cycles: 43.55
  • UOPS_EXECUTED.THREAD: 28.1
  • RETIRE_SLOTS: 30.12
  • UOPS_MITE: 30.15
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 7.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 56.0
  • UOPS_PORT_3: 56.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 7.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_7: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.11