RDMSR - Throughput and Uops
With unroll_count=500 and no inner loop
- Code:
0: 0f 32 rdmsr
- Init:
MOV RCX, 0xE7
- Show nanoBench command
- Results:
- Instructions retired: 1.0
- Core cycles: 94.26
- Reference cycles: 65.2
- UOPS_EXECUTED.THREAD: 63.0
- RETIRE_SLOTS: 74.0
- UOPS_MITE: 0.0
- UOPS_MS: 74.0
- UOPS_PORT_0: 13.0
- UOPS_PORT_1: 13.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 15.0
- UOPS_PORT_6: 22.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0
With unroll_count=500, no inner loop, and 1 NOP
- Code:
0: 0f 32 rdmsr
2: 90 nop
- Init:
MOV RCX, 0xE7
- Show nanoBench command
- Results:
- Instructions retired: 2.0
- Core cycles: 95.31
- Reference cycles: 65.84
- UOPS_EXECUTED.THREAD: 63.0
- RETIRE_SLOTS: 75.0
- UOPS_MITE: 1.0
- UOPS_MS: 74.0
- UOPS_PORT_0: 13.0
- UOPS_PORT_1: 13.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 15.0
- UOPS_PORT_6: 21.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0
With loop_count=1000 and unroll_count=10
- Code:
0: 0f 32 rdmsr
- Init:
MOV RCX, 0xE7
- Show nanoBench command
- Results:
- Instructions retired: 1.2
- Core cycles: 95.2
- Reference cycles: 67.77
- UOPS_EXECUTED.THREAD: 63.1
- RETIRE_SLOTS: 74.1
- UOPS_MITE: 0.1
- UOPS_MS: 74.0
- UOPS_PORT_0: 12.9
- UOPS_PORT_1: 13.2
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 14.9
- UOPS_PORT_6: 22.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.1
With loop_count=100 and unroll_count=100
- Code:
0: 0f 32 rdmsr
- Init:
MOV RCX, 0xE7
- Show nanoBench command
- Results:
- Instructions retired: 1.02
- Core cycles: 94.08
- Reference cycles: 65.07
- UOPS_EXECUTED.THREAD: 63.01
- RETIRE_SLOTS: 74.01
- UOPS_MITE: 0.01
- UOPS_MS: 74.0
- UOPS_PORT_0: 12.99
- UOPS_PORT_1: 13.02
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 14.99
- UOPS_PORT_6: 22.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01