IDIV (R64)

With unroll_count=500 and no inner loop

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 10.0
- Reference cycles: 6.96
- UOPS_EXECUTED.THREAD: 6.01
- RETIRE_SLOTS: 6.0
- UOPS_MITE: 6.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.18
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.41
- UOPS_PORT_6: 0.41
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With unroll_count=500 and no inner loop

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	48 f7 fb             	idiv   rbx
  11:	0f ae e8             	lfence

Init:
```
MOV RBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 28.0
- Reference cycles: 19.32
- UOPS_EXECUTED.THREAD: 6.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 6.0
- UOPS_MS: 2.0
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.2
- Core cycles: 10.0
- Reference cycles: 6.92
- UOPS_EXECUTED.THREAD: 6.1
- RETIRE_SLOTS: 6.1
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.51
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.07
- UOPS_PORT_6: 0.52
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=1000, unroll_count=10, and padding (redundant prefixes)

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	40                   	rex
   f:	40                   	rex
  10:	40                   	rex
  11:	40                   	rex
  12:	40                   	rex
  13:	40                   	rex
  14:	40                   	rex
  15:	40                   	rex
  16:	40                   	rex
  17:	40                   	rex
  18:	40                   	rex
  19:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.2
- Core cycles: 10.0
- Reference cycles: 6.91
- UOPS_EXECUTED.THREAD: 6.1
- RETIRE_SLOTS: 6.1
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.48
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.43
- UOPS_PORT_6: 2.19
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.02
- Core cycles: 10.0
- Reference cycles: 6.92
- UOPS_EXECUTED.THREAD: 6.01
- RETIRE_SLOTS: 6.01
- UOPS_MITE: 0.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.58
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.69
- UOPS_PORT_6: 1.74
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With loop_count=100, unroll_count=100, and padding (redundant prefixes)

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	40                   	rex
   f:	40                   	rex
  10:	40                   	rex
  11:	40                   	rex
  12:	40                   	rex
  13:	40                   	rex
  14:	40                   	rex
  15:	40                   	rex
  16:	40                   	rex
  17:	40                   	rex
  18:	40                   	rex
  19:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.02
- Core cycles: 10.0
- Reference cycles: 6.91
- UOPS_EXECUTED.THREAD: 6.01
- RETIRE_SLOTS: 6.01
- UOPS_MITE: 0.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.58
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.69
- UOPS_PORT_6: 1.74
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With unroll_count=500 and no inner loop

Code:

   0:	48 c7 c0 85 00 00 00 	mov    rax,0x85
   7:	48 ba 77 66 55 44 d7 	movabs rdx,0x343a9ed744556677
   e:	9e 3a 34 
  11:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 0x75e6e44fccddeeff
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 10.0
- Reference cycles: 6.96
- UOPS_EXECUTED.THREAD: 6.01
- RETIRE_SLOTS: 6.0
- UOPS_MITE: 6.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.18
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.41
- UOPS_PORT_6: 0.41
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With unroll_count=500 and no inner loop

Code:

   0:	48 c7 c0 85 00 00 00 	mov    rax,0x85
   7:	48 ba 77 66 55 44 d7 	movabs rdx,0x343a9ed744556677
   e:	9e 3a 34 
  11:	48 f7 fb             	idiv   rbx
  14:	0f ae e8             	lfence

Init:
```
MOV RBX, 0x75e6e44fccddeeff
```
Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 28.0
- Reference cycles: 19.32
- UOPS_EXECUTED.THREAD: 6.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 6.0
- UOPS_MS: 2.0
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	48 c7 c0 85 00 00 00 	mov    rax,0x85
   7:	48 ba 77 66 55 44 d7 	movabs rdx,0x343a9ed744556677
   e:	9e 3a 34 
  11:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 0x75e6e44fccddeeff
```
Show nanoBench command
Results:
- Instructions retired: 3.2
- Core cycles: 10.0
- Reference cycles: 6.92
- UOPS_EXECUTED.THREAD: 6.1
- RETIRE_SLOTS: 6.1
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.48
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.43
- UOPS_PORT_6: 2.19
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=1000, unroll_count=10, and padding (redundant prefixes)

Code:

   0:	48 c7 c0 85 00 00 00 	mov    rax,0x85
   7:	48 ba 77 66 55 44 d7 	movabs rdx,0x343a9ed744556677
   e:	9e 3a 34 
  11:	40                   	rex
  12:	40                   	rex
  13:	40                   	rex
  14:	40                   	rex
  15:	40                   	rex
  16:	40                   	rex
  17:	40                   	rex
  18:	40                   	rex
  19:	40                   	rex
  1a:	40                   	rex
  1b:	40                   	rex
  1c:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 0x75e6e44fccddeeff
```
Show nanoBench command
Results:
- Instructions retired: 3.2
- Core cycles: 10.0
- Reference cycles: 6.92
- UOPS_EXECUTED.THREAD: 6.1
- RETIRE_SLOTS: 6.1
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.48
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.43
- UOPS_PORT_6: 2.19
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	48 c7 c0 85 00 00 00 	mov    rax,0x85
   7:	48 ba 77 66 55 44 d7 	movabs rdx,0x343a9ed744556677
   e:	9e 3a 34 
  11:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 0x75e6e44fccddeeff
```
Show nanoBench command
Results:
- Instructions retired: 3.02
- Core cycles: 10.0
- Reference cycles: 6.96
- UOPS_EXECUTED.THREAD: 6.01
- RETIRE_SLOTS: 6.01
- UOPS_MITE: 0.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.58
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.69
- UOPS_PORT_6: 1.74
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With loop_count=100, unroll_count=100, and padding (redundant prefixes)

Code:

   0:	48 c7 c0 85 00 00 00 	mov    rax,0x85
   7:	48 ba 77 66 55 44 d7 	movabs rdx,0x343a9ed744556677
   e:	9e 3a 34 
  11:	40                   	rex
  12:	40                   	rex
  13:	40                   	rex
  14:	40                   	rex
  15:	40                   	rex
  16:	40                   	rex
  17:	40                   	rex
  18:	40                   	rex
  19:	40                   	rex
  1a:	40                   	rex
  1b:	40                   	rex
  1c:	48 f7 fb             	idiv   rbx

Init:
```
MOV RBX, 0x75e6e44fccddeeff
```
Show nanoBench command
Results:
- Instructions retired: 3.02
- Core cycles: 10.0
- Reference cycles: 6.92
- UOPS_EXECUTED.THREAD: 6.01
- RETIRE_SLOTS: 6.01
- UOPS_MITE: 0.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.58
- UOPS_PORT_1: 3.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.69
- UOPS_PORT_6: 1.74
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

IDIV (R64) - Throughput and Uops

Fast division

With unroll_count=500 and no inner loop

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=1000, unroll_count=10, and padding (redundant prefixes)

With loop_count=100 and unroll_count=100

With loop_count=100, unroll_count=100, and padding (redundant prefixes)

Slow division

With unroll_count=500 and no inner loop

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=1000, unroll_count=10, and padding (redundant prefixes)

With loop_count=100 and unroll_count=100

With loop_count=100, unroll_count=100, and padding (redundant prefixes)