VPDPBUSD (ZMM, K, ZMM, ZMM)

With unroll_count=500 and no inner loop

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 5.5
- Reference cycles: 4.46
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.5
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 5.45
- Reference cycles: 4.3
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 1.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.5
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.3

With loop_count=100 and unroll_count=100

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 5.47
- Reference cycles: 4.33
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.5
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 5.0
- Reference cycles: 4.17
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 5.28
- Reference cycles: 4.17
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.01
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 5.07
- Reference cycles: 4.0
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2
  18:	62 f2 75 49 50 f2    	vpdpbusd zmm6{k1},zmm1,zmm2
  1e:	62 f2 75 49 50 fa    	vpdpbusd zmm7{k1},zmm1,zmm2
  24:	62 72 75 49 50 c2    	vpdpbusd zmm8{k1},zmm1,zmm2
  2a:	62 72 75 49 50 ca    	vpdpbusd zmm9{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 5.0
- Reference cycles: 4.58
- UOPS_EXECUTED.THREAD: 7.99
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2
  18:	62 f2 75 49 50 f2    	vpdpbusd zmm6{k1},zmm1,zmm2
  1e:	62 f2 75 49 50 fa    	vpdpbusd zmm7{k1},zmm1,zmm2
  24:	62 72 75 49 50 c2    	vpdpbusd zmm8{k1},zmm1,zmm2
  2a:	62 72 75 49 50 ca    	vpdpbusd zmm9{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 5.48
- Reference cycles: 4.35
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.91
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.09
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2
  18:	62 f2 75 49 50 f2    	vpdpbusd zmm6{k1},zmm1,zmm2
  1e:	62 f2 75 49 50 fa    	vpdpbusd zmm7{k1},zmm1,zmm2
  24:	62 72 75 49 50 c2    	vpdpbusd zmm8{k1},zmm1,zmm2
  2a:	62 72 75 49 50 ca    	vpdpbusd zmm9{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 5.36
- Reference cycles: 4.23
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.93
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.07
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2
  18:	62 f2 75 49 50 f2    	vpdpbusd zmm6{k1},zmm1,zmm2
  1e:	62 f2 75 49 50 fa    	vpdpbusd zmm7{k1},zmm1,zmm2
  24:	62 72 75 49 50 c2    	vpdpbusd zmm8{k1},zmm1,zmm2
  2a:	62 72 75 49 50 ca    	vpdpbusd zmm9{k1},zmm1,zmm2
  30:	62 72 75 49 50 d2    	vpdpbusd zmm10{k1},zmm1,zmm2
  36:	62 72 75 49 50 da    	vpdpbusd zmm11{k1},zmm1,zmm2
  3c:	62 72 75 49 50 e2    	vpdpbusd zmm12{k1},zmm1,zmm2
  42:	62 e2 75 49 50 c2    	vpdpbusd zmm16{k1},zmm1,zmm2
  48:	62 e2 75 49 50 ca    	vpdpbusd zmm17{k1},zmm1,zmm2
  4e:	62 e2 75 49 50 d2    	vpdpbusd zmm18{k1},zmm1,zmm2
  54:	62 e2 75 49 50 da    	vpdpbusd zmm19{k1},zmm1,zmm2
  5a:	62 e2 75 49 50 e2    	vpdpbusd zmm20{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18;
VXORPS ZMM19, ZMM19, ZMM19;
VXORPS ZMM20, ZMM20, ZMM20

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 8.0
- Reference cycles: 6.04
- UOPS_EXECUTED.THREAD: 16.02
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2
  18:	62 f2 75 49 50 f2    	vpdpbusd zmm6{k1},zmm1,zmm2
  1e:	62 f2 75 49 50 fa    	vpdpbusd zmm7{k1},zmm1,zmm2
  24:	62 72 75 49 50 c2    	vpdpbusd zmm8{k1},zmm1,zmm2
  2a:	62 72 75 49 50 ca    	vpdpbusd zmm9{k1},zmm1,zmm2
  30:	62 72 75 49 50 d2    	vpdpbusd zmm10{k1},zmm1,zmm2
  36:	62 72 75 49 50 da    	vpdpbusd zmm11{k1},zmm1,zmm2
  3c:	62 72 75 49 50 e2    	vpdpbusd zmm12{k1},zmm1,zmm2
  42:	62 e2 75 49 50 c2    	vpdpbusd zmm16{k1},zmm1,zmm2
  48:	62 e2 75 49 50 ca    	vpdpbusd zmm17{k1},zmm1,zmm2
  4e:	62 e2 75 49 50 d2    	vpdpbusd zmm18{k1},zmm1,zmm2
  54:	62 e2 75 49 50 da    	vpdpbusd zmm19{k1},zmm1,zmm2
  5a:	62 e2 75 49 50 e2    	vpdpbusd zmm20{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18;
VXORPS ZMM19, ZMM19, ZMM19;
VXORPS ZMM20, ZMM20, ZMM20

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 8.01
- Reference cycles: 6.35
- UOPS_EXECUTED.THREAD: 17.0
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 75 49 50 c2    	vpdpbusd zmm0{k1},zmm1,zmm2
   6:	62 f2 75 49 50 da    	vpdpbusd zmm3{k1},zmm1,zmm2
   c:	62 f2 75 49 50 e2    	vpdpbusd zmm4{k1},zmm1,zmm2
  12:	62 f2 75 49 50 ea    	vpdpbusd zmm5{k1},zmm1,zmm2
  18:	62 f2 75 49 50 f2    	vpdpbusd zmm6{k1},zmm1,zmm2
  1e:	62 f2 75 49 50 fa    	vpdpbusd zmm7{k1},zmm1,zmm2
  24:	62 72 75 49 50 c2    	vpdpbusd zmm8{k1},zmm1,zmm2
  2a:	62 72 75 49 50 ca    	vpdpbusd zmm9{k1},zmm1,zmm2
  30:	62 72 75 49 50 d2    	vpdpbusd zmm10{k1},zmm1,zmm2
  36:	62 72 75 49 50 da    	vpdpbusd zmm11{k1},zmm1,zmm2
  3c:	62 72 75 49 50 e2    	vpdpbusd zmm12{k1},zmm1,zmm2
  42:	62 e2 75 49 50 c2    	vpdpbusd zmm16{k1},zmm1,zmm2
  48:	62 e2 75 49 50 ca    	vpdpbusd zmm17{k1},zmm1,zmm2
  4e:	62 e2 75 49 50 d2    	vpdpbusd zmm18{k1},zmm1,zmm2
  54:	62 e2 75 49 50 da    	vpdpbusd zmm19{k1},zmm1,zmm2
  5a:	62 e2 75 49 50 e2    	vpdpbusd zmm20{k1},zmm1,zmm2

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18;
VXORPS ZMM19, ZMM19, ZMM19;
VXORPS ZMM20, ZMM20, ZMM20

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 8.01
- Reference cycles: 6.31
- UOPS_EXECUTED.THREAD: 16.1
- RETIRE_SLOTS: 16.1
- UOPS_MITE: 0.16
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 5.5
- Reference cycles: 4.46
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.5
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 5.45
- Reference cycles: 4.3
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 1.1
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.5
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.3

With loop_count=100 and unroll_count=100

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 5.47
- Reference cycles: 4.32
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.06
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.5
- UOPS_PORT_6: 0.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 5.0
- Reference cycles: 4.17
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 5.28
- Reference cycles: 4.18
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.98
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.02
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 5.1
- Reference cycles: 4.04
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.01
- UOPS_PORT_6: 0.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3
  18:	62 f2 5d 49 50 e4    	vpdpbusd zmm4{k1},zmm4,zmm4
  1e:	62 f2 55 49 50 ed    	vpdpbusd zmm5{k1},zmm5,zmm5
  24:	62 f2 4d 49 50 f6    	vpdpbusd zmm6{k1},zmm6,zmm6
  2a:	62 f2 45 49 50 ff    	vpdpbusd zmm7{k1},zmm7,zmm7

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 5.0
- Reference cycles: 4.79
- UOPS_EXECUTED.THREAD: 8.02
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3
  18:	62 f2 5d 49 50 e4    	vpdpbusd zmm4{k1},zmm4,zmm4
  1e:	62 f2 55 49 50 ed    	vpdpbusd zmm5{k1},zmm5,zmm5
  24:	62 f2 4d 49 50 f6    	vpdpbusd zmm6{k1},zmm6,zmm6
  2a:	62 f2 45 49 50 ff    	vpdpbusd zmm7{k1},zmm7,zmm7

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 5.49
- Reference cycles: 4.35
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.96
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.04
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3
  18:	62 f2 5d 49 50 e4    	vpdpbusd zmm4{k1},zmm4,zmm4
  1e:	62 f2 55 49 50 ed    	vpdpbusd zmm5{k1},zmm5,zmm5
  24:	62 f2 4d 49 50 f6    	vpdpbusd zmm6{k1},zmm6,zmm6
  2a:	62 f2 45 49 50 ff    	vpdpbusd zmm7{k1},zmm7,zmm7

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 5.26
- Reference cycles: 4.17
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.93
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.07
- UOPS_PORT_6: 0.09
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 16 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3
  18:	62 f2 5d 49 50 e4    	vpdpbusd zmm4{k1},zmm4,zmm4
  1e:	62 f2 55 49 50 ed    	vpdpbusd zmm5{k1},zmm5,zmm5
  24:	62 f2 4d 49 50 f6    	vpdpbusd zmm6{k1},zmm6,zmm6
  2a:	62 f2 45 49 50 ff    	vpdpbusd zmm7{k1},zmm7,zmm7
  30:	62 52 3d 49 50 c0    	vpdpbusd zmm8{k1},zmm8,zmm8
  36:	62 52 35 49 50 c9    	vpdpbusd zmm9{k1},zmm9,zmm9
  3c:	62 52 2d 49 50 d2    	vpdpbusd zmm10{k1},zmm10,zmm10
  42:	62 52 25 49 50 db    	vpdpbusd zmm11{k1},zmm11,zmm11
  48:	62 52 1d 49 50 e4    	vpdpbusd zmm12{k1},zmm12,zmm12
  4e:	62 a2 7d 41 50 c0    	vpdpbusd zmm16{k1},zmm16,zmm16
  54:	62 a2 75 41 50 c9    	vpdpbusd zmm17{k1},zmm17,zmm17
  5a:	62 a2 6d 41 50 d2    	vpdpbusd zmm18{k1},zmm18,zmm18

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 8.0
- Reference cycles: 6.46
- UOPS_EXECUTED.THREAD: 16.02
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=1

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3
  18:	62 f2 5d 49 50 e4    	vpdpbusd zmm4{k1},zmm4,zmm4
  1e:	62 f2 55 49 50 ed    	vpdpbusd zmm5{k1},zmm5,zmm5
  24:	62 f2 4d 49 50 f6    	vpdpbusd zmm6{k1},zmm6,zmm6
  2a:	62 f2 45 49 50 ff    	vpdpbusd zmm7{k1},zmm7,zmm7
  30:	62 52 3d 49 50 c0    	vpdpbusd zmm8{k1},zmm8,zmm8
  36:	62 52 35 49 50 c9    	vpdpbusd zmm9{k1},zmm9,zmm9
  3c:	62 52 2d 49 50 d2    	vpdpbusd zmm10{k1},zmm10,zmm10
  42:	62 52 25 49 50 db    	vpdpbusd zmm11{k1},zmm11,zmm11
  48:	62 52 1d 49 50 e4    	vpdpbusd zmm12{k1},zmm12,zmm12
  4e:	62 a2 7d 41 50 c0    	vpdpbusd zmm16{k1},zmm16,zmm16
  54:	62 a2 75 41 50 c9    	vpdpbusd zmm17{k1},zmm17,zmm17
  5a:	62 a2 6d 41 50 d2    	vpdpbusd zmm18{k1},zmm18,zmm18

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 8.01
- Reference cycles: 6.33
- UOPS_EXECUTED.THREAD: 17.0
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	62 f2 7d 49 50 c0    	vpdpbusd zmm0{k1},zmm0,zmm0
   6:	62 f2 75 49 50 c9    	vpdpbusd zmm1{k1},zmm1,zmm1
   c:	62 f2 6d 49 50 d2    	vpdpbusd zmm2{k1},zmm2,zmm2
  12:	62 f2 65 49 50 db    	vpdpbusd zmm3{k1},zmm3,zmm3
  18:	62 f2 5d 49 50 e4    	vpdpbusd zmm4{k1},zmm4,zmm4
  1e:	62 f2 55 49 50 ed    	vpdpbusd zmm5{k1},zmm5,zmm5
  24:	62 f2 4d 49 50 f6    	vpdpbusd zmm6{k1},zmm6,zmm6
  2a:	62 f2 45 49 50 ff    	vpdpbusd zmm7{k1},zmm7,zmm7
  30:	62 52 3d 49 50 c0    	vpdpbusd zmm8{k1},zmm8,zmm8
  36:	62 52 35 49 50 c9    	vpdpbusd zmm9{k1},zmm9,zmm9
  3c:	62 52 2d 49 50 d2    	vpdpbusd zmm10{k1},zmm10,zmm10
  42:	62 52 25 49 50 db    	vpdpbusd zmm11{k1},zmm11,zmm11
  48:	62 52 1d 49 50 e4    	vpdpbusd zmm12{k1},zmm12,zmm12
  4e:	62 a2 7d 41 50 c0    	vpdpbusd zmm16{k1},zmm16,zmm16
  54:	62 a2 75 41 50 c9    	vpdpbusd zmm17{k1},zmm17,zmm17
  5a:	62 a2 6d 41 50 d2    	vpdpbusd zmm18{k1},zmm18,zmm18

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS ZMM0, ZMM0, ZMM0;
VXORPS ZMM1, ZMM1, ZMM1;
VXORPS ZMM2, ZMM2, ZMM2;
VXORPS ZMM3, ZMM3, ZMM3;
VXORPS ZMM4, ZMM4, ZMM4;
VXORPS ZMM5, ZMM5, ZMM5;
VXORPS ZMM6, ZMM6, ZMM6;
VXORPS ZMM7, ZMM7, ZMM7;
VXORPS ZMM8, ZMM8, ZMM8;
VXORPS ZMM9, ZMM9, ZMM9;
VXORPS ZMM10, ZMM10, ZMM10;
VXORPS ZMM11, ZMM11, ZMM11;
VXORPS ZMM12, ZMM12, ZMM12;
VXORPS ZMM16, ZMM16, ZMM16;
VXORPS ZMM17, ZMM17, ZMM17;
VXORPS ZMM18, ZMM18, ZMM18

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 8.01
- Reference cycles: 6.33
- UOPS_EXECUTED.THREAD: 16.1
- RETIRE_SLOTS: 16.1
- UOPS_MITE: 0.16
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

VPDPBUSD (ZMM, K, ZMM, ZMM) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 16 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10