DIV (R8l)

With unroll_count=500 and no inner loop

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	f6 f3                	div    bl

Init:
```
MOV BL, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 6.0
- Reference cycles: 3.88
- UOPS_EXECUTED.THREAD: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MITE: 6.0
- UOPS_MS: 6.0
- UOPS_PORT_0: 2.33
- UOPS_PORT_1: 2.83
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.67
- UOPS_PORT_6: 2.17
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 3.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With unroll_count=500 and no inner loop

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	f6 f3                	div    bl
  10:	0f ae e8             	lfence

Init:
```
MOV BL, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 35.38
- Reference cycles: 23.0
- UOPS_EXECUTED.THREAD: 12.0
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 6.0
- UOPS_MS: 8.0
- UOPS_PORT_0: 3.0
- UOPS_PORT_1: 2.5
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.5
- UOPS_PORT_6: 2.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 3.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	f6 f3                	div    bl

Init:
```
MOV BL, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.2
- Core cycles: 6.1
- Reference cycles: 4.16
- UOPS_EXECUTED.THREAD: 12.1
- RETIRE_SLOTS: 12.1
- UOPS_MITE: 6.1
- UOPS_MS: 6.0
- UOPS_PORT_0: 2.36
- UOPS_PORT_1: 2.56
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.78
- UOPS_PORT_6: 2.4
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 3.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.1

With loop_count=100 and unroll_count=100

Code:

   0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
   7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
   e:	f6 f3                	div    bl

Init:
```
MOV BL, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.02
- Core cycles: 6.01
- Reference cycles: 3.91
- UOPS_EXECUTED.THREAD: 12.01
- RETIRE_SLOTS: 12.01
- UOPS_MITE: 6.01
- UOPS_MS: 6.0
- UOPS_PORT_0: 2.32
- UOPS_PORT_1: 2.66
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.65
- UOPS_PORT_6: 2.38
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 3.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.01

With unroll_count=500 and no inner loop

Code:

   0:	66 b8 01 33          	mov    ax,0x3301
   4:	f6 f3                	div    bl

Init:
```
MOV BL, 123
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 22.0
- Reference cycles: 14.25
- UOPS_EXECUTED.THREAD: 11.0
- RETIRE_SLOTS: 11.0
- UOPS_MITE: 5.0
- UOPS_MS: 6.0
- UOPS_PORT_0: 2.25
- UOPS_PORT_1: 2.35
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.11
- UOPS_PORT_6: 2.29
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 3.0
- ILD_STALL.LCP: 3.0
- UOPS_MITE>=1: 2.0

With unroll_count=500 and no inner loop

Code:

   0:	66 b8 01 33          	mov    ax,0x3301
   4:	f6 f3                	div    bl
   6:	0f ae e8             	lfence

Init:
```
MOV BL, 123
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 35.31
- Reference cycles: 23.0
- UOPS_EXECUTED.THREAD: 11.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 5.0
- UOPS_MS: 8.0
- UOPS_PORT_0: 2.75
- UOPS_PORT_1: 2.25
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.25
- UOPS_PORT_6: 1.75
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 3.0
- ILD_STALL.LCP: 3.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	66 b8 01 33          	mov    ax,0x3301
   4:	f6 f3                	div    bl

Init:
```
MOV BL, 123
```
Show nanoBench command
Results:
- Instructions retired: 2.2
- Core cycles: 22.0
- Reference cycles: 14.35
- UOPS_EXECUTED.THREAD: 11.1
- RETIRE_SLOTS: 11.1
- UOPS_MITE: 5.1
- UOPS_MS: 6.0
- UOPS_PORT_0: 2.24
- UOPS_PORT_1: 2.31
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.12
- UOPS_PORT_6: 2.42
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 3.0
- ILD_STALL.LCP: 3.0
- UOPS_MITE>=1: 2.1

With loop_count=100 and unroll_count=100

Code:

   0:	66 b8 01 33          	mov    ax,0x3301
   4:	f6 f3                	div    bl

Init:
```
MOV BL, 123
```
Show nanoBench command
Results:
- Instructions retired: 2.02
- Core cycles: 22.0
- Reference cycles: 14.34
- UOPS_EXECUTED.THREAD: 11.01
- RETIRE_SLOTS: 11.01
- UOPS_MITE: 5.01
- UOPS_MS: 6.0
- UOPS_PORT_0: 2.24
- UOPS_PORT_1: 2.4
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.21
- UOPS_PORT_6: 2.17
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 3.0
- ILD_STALL.LCP: 3.0
- UOPS_MITE>=1: 2.01

DIV (R8l) - Throughput and Uops

Fast division

With unroll_count=500 and no inner loop

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

Slow division

With unroll_count=500 and no inner loop

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100