IMUL (R32, R32)

With unroll_count=500 and no inner loop

Code:

   0:	45 0f af c1          	imul   r8d,r9d

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 5.0
- Reference cycles: 5.0
- UOPS_RETIRED.ANY: 1.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	45 0f af c1          	imul   r8d,r9d

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 5.0
- Reference cycles: 5.0
- UOPS_RETIRED.ANY: 1.2
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	45 0f af c1          	imul   r8d,r9d

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 5.0
- Reference cycles: 5.0
- UOPS_RETIRED.ANY: 1.02
- UOPS_MS: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 8.0
- Reference cycles: 8.01
- UOPS_RETIRED.ANY: 4.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 8.01
- Reference cycles: 8.01
- UOPS_RETIRED.ANY: 5.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 8.01
- Reference cycles: 8.01
- UOPS_RETIRED.ANY: 4.1
- UOPS_MS: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d
  10:	45 0f af e9          	imul   r13d,r9d
  14:	45 0f af f1          	imul   r14d,r9d
  18:	41 0f af d9          	imul   ebx,r9d
  1c:	41 0f af c9          	imul   ecx,r9d

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 8.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d
  10:	45 0f af e9          	imul   r13d,r9d
  14:	45 0f af f1          	imul   r14d,r9d
  18:	41 0f af d9          	imul   ebx,r9d
  1c:	41 0f af c9          	imul   ecx,r9d

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 16.02
- Reference cycles: 16.01
- UOPS_RETIRED.ANY: 10.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d
  10:	45 0f af e9          	imul   r13d,r9d
  14:	45 0f af f1          	imul   r14d,r9d
  18:	41 0f af d9          	imul   ebx,r9d
  1c:	41 0f af c9          	imul   ecx,r9d

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 16.02
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 8.2
- UOPS_MS: 0.0

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d
  10:	45 0f af e9          	imul   r13d,r9d
  14:	45 0f af f1          	imul   r14d,r9d
  18:	41 0f af d9          	imul   ebx,r9d
  1c:	41 0f af c9          	imul   ecx,r9d
  20:	41 0f af d1          	imul   edx,r9d
  24:	41 0f af f9          	imul   edi,r9d
  28:	41 0f af f1          	imul   esi,r9d
  2c:	41 0f af e9          	imul   ebp,r9d

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 24.0
- Reference cycles: 24.0
- UOPS_RETIRED.ANY: 12.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d
  10:	45 0f af e9          	imul   r13d,r9d
  14:	45 0f af f1          	imul   r14d,r9d
  18:	41 0f af d9          	imul   ebx,r9d
  1c:	41 0f af c9          	imul   ecx,r9d
  20:	41 0f af d1          	imul   edx,r9d
  24:	41 0f af f9          	imul   edi,r9d
  28:	41 0f af f1          	imul   esi,r9d
  2c:	41 0f af e9          	imul   ebp,r9d

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 24.02
- Reference cycles: 24.02
- UOPS_RETIRED.ANY: 14.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f af d1          	imul   r10d,r9d
   8:	45 0f af d9          	imul   r11d,r9d
   c:	45 0f af e1          	imul   r12d,r9d
  10:	45 0f af e9          	imul   r13d,r9d
  14:	45 0f af f1          	imul   r14d,r9d
  18:	41 0f af d9          	imul   ebx,r9d
  1c:	41 0f af c9          	imul   ecx,r9d
  20:	41 0f af d1          	imul   edx,r9d
  24:	41 0f af f9          	imul   edi,r9d
  28:	41 0f af f1          	imul   esi,r9d
  2c:	41 0f af e9          	imul   ebp,r9d

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 24.02
- Reference cycles: 24.02
- UOPS_RETIRED.ANY: 12.2
- UOPS_MS: 0.0

With the same register for for different operands

With unroll_count=500 and no inner loop

Code:

   0:	45 0f af c0          	imul   r8d,r8d

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 5.0
- Reference cycles: 5.0
- UOPS_RETIRED.ANY: 1.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	45 0f af c0          	imul   r8d,r8d

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 5.0
- Reference cycles: 5.0
- UOPS_RETIRED.ANY: 1.2
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	45 0f af c0          	imul   r8d,r8d

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 5.0
- Reference cycles: 5.0
- UOPS_RETIRED.ANY: 1.02
- UOPS_MS: 0.0

IMUL (R32, R32) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 12 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100