VUNPCKLPS (YMM, YMM, M256) - Throughput and Uops (IACA 3.0)
With a non-indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles Throughput Bottleneck: Backend
Loop Count: 48
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 1.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 2^ | | | 0.5 0.5 | 0.5 0.5 | | 1.0 | | | vunpcklps ymm0, ymm1, ymmword ptr [r14]
Total Num Of Uops: 2
With 12 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 12.00 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 6.0 6.0 | 6.0 6.0 | 0.0 | 12.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 2^ | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm0, ymm1, ymmword ptr [r14]
| 2^ | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm2, ymm1, ymmword ptr [r14+0x20]
| 2^ | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm3, ymm1, ymmword ptr [r14+0x40]
| 2^ | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm4, ymm1, ymmword ptr [r14+0x60]
| 2^ | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm5, ymm1, ymmword ptr [r14+0x80]
| 2^ | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm6, ymm1, ymmword ptr [r14+0xa0]
| 2^ | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm7, ymm1, ymmword ptr [r14+0xc0]
| 2^ | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm8, ymm1, ymmword ptr [r14+0xe0]
| 2^ | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm9, ymm1, ymmword ptr [r14+0x100]
| 2^ | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm10, ymm1, ymmword ptr [r14+0x120]
| 2^ | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm11, ymm1, ymmword ptr [r14+0x140]
| 2^ | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm12, ymm1, ymmword ptr [r14+0x160]
Total Num Of Uops: 24
With an indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 1.00 Cycles Throughput Bottleneck: Dependency chains
Loop Count: 44
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 1.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 2 | | | 0.5 0.5 | 0.5 0.5 | | 1.0 | | | vunpcklps ymm0, ymm1, ymmword ptr [r14+r13*1]
Total Num Of Uops: 2
With 12 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 12.00 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 0.0 | 6.0 6.0 | 6.0 6.0 | 0.0 | 12.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 2 | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm0, ymm1, ymmword ptr [r14+r13*1]
| 2 | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm2, ymm1, ymmword ptr [r14+r13*1+0x20]
| 2 | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm3, ymm1, ymmword ptr [r14+r13*1+0x40]
| 2 | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm4, ymm1, ymmword ptr [r14+r13*1+0x60]
| 2 | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm5, ymm1, ymmword ptr [r14+r13*1+0x80]
| 2 | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm6, ymm1, ymmword ptr [r14+r13*1+0xa0]
| 2 | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm7, ymm1, ymmword ptr [r14+r13*1+0xc0]
| 2 | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm8, ymm1, ymmword ptr [r14+r13*1+0xe0]
| 2 | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm9, ymm1, ymmword ptr [r14+r13*1+0x100]
| 2 | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm10, ymm1, ymmword ptr [r14+r13*1+0x120]
| 2 | | | 1.0 1.0 | | | 1.0 | | | vunpcklps ymm11, ymm1, ymmword ptr [r14+r13*1+0x140]
| 2 | | | | 1.0 1.0 | | 1.0 | | | vunpcklps ymm12, ymm1, ymmword ptr [r14+r13*1+0x160]
Total Num Of Uops: 24