VINSERTI128 (YMM, YMM, M128, I8) - Throughput and Uops (IACA 2.2)
With a non-indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 0.50 Cycles Throughput Bottleneck: PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
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| Cycles | 0.3 0.0 | 0.3 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.3 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
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| 2^ | 0.3 | 0.3 | 0.5 0.5 | 0.5 0.5 | | 0.3 | | | CP | vinserti128 ymm0, ymm1, xmmword ptr [r14], 0x2
Total Num Of Uops: 2
With 12 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 6.00 Cycles Throughput Bottleneck: FrontEnd, PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 4.0 0.0 | 4.0 | 6.0 6.0 | 6.0 6.0 | 0.0 | 4.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2^ | 1.0 | | 1.0 1.0 | | | | | | CP | vinserti128 ymm0, ymm1, xmmword ptr [r14], 0x2
| 2^ | | 1.0 | | 1.0 1.0 | | | | | CP | vinserti128 ymm2, ymm1, xmmword ptr [r14+0x10], 0x2
| 2^ | | | 1.0 1.0 | | | 1.0 | | | CP | vinserti128 ymm3, ymm1, xmmword ptr [r14+0x20], 0x2
| 2^ | 1.0 | | | 1.0 1.0 | | | | | CP | vinserti128 ymm4, ymm1, xmmword ptr [r14+0x30], 0x2
| 2^ | | 1.0 | 1.0 1.0 | | | | | | CP | vinserti128 ymm5, ymm1, xmmword ptr [r14+0x40], 0x2
| 2^ | | | | 1.0 1.0 | | 1.0 | | | CP | vinserti128 ymm6, ymm1, xmmword ptr [r14+0x50], 0x2
| 2^ | 1.0 | | 1.0 1.0 | | | | | | CP | vinserti128 ymm7, ymm1, xmmword ptr [r14+0x60], 0x2
| 2^ | | 1.0 | | 1.0 1.0 | | | | | CP | vinserti128 ymm8, ymm1, xmmword ptr [r14+0x70], 0x2
| 2^ | | | 1.0 1.0 | | | 1.0 | | | CP | vinserti128 ymm9, ymm1, xmmword ptr [r14+0x80], 0x2
| 2^ | 1.0 | | | 1.0 1.0 | | | | | CP | vinserti128 ymm10, ymm1, xmmword ptr [r14+0x90], 0x2
| 2^ | | 1.0 | 1.0 1.0 | | | | | | CP | vinserti128 ymm11, ymm1, xmmword ptr [r14+0xa0], 0x2
| 2^ | | | | 1.0 1.0 | | 1.0 | | | CP | vinserti128 ymm12, ymm1, xmmword ptr [r14+0xb0], 0x2
Total Num Of Uops: 24
With an indexed addressing mode
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 0.50 Cycles Throughput Bottleneck: FrontEnd, PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.3 0.0 | 0.3 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.3 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2 | 0.3 | 0.3 | 0.5 0.5 | 0.5 0.5 | | 0.3 | | | CP | vinserti128 ymm0, ymm1, xmmword ptr [r14+r13*1], 0x2
Total Num Of Uops: 2
With 12 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 6.00 Cycles Throughput Bottleneck: FrontEnd, PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 4.0 0.0 | 4.0 | 6.0 6.0 | 6.0 6.0 | 0.0 | 4.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2 | 1.0 | | 1.0 1.0 | | | | | | CP | vinserti128 ymm0, ymm1, xmmword ptr [r14+r13*1], 0x2
| 2 | | 1.0 | | 1.0 1.0 | | | | | CP | vinserti128 ymm2, ymm1, xmmword ptr [r14+r13*1+0x10], 0x2
| 2 | | | 1.0 1.0 | | | 1.0 | | | CP | vinserti128 ymm3, ymm1, xmmword ptr [r14+r13*1+0x20], 0x2
| 2 | 1.0 | | | 1.0 1.0 | | | | | CP | vinserti128 ymm4, ymm1, xmmword ptr [r14+r13*1+0x30], 0x2
| 2 | | 1.0 | 1.0 1.0 | | | | | | CP | vinserti128 ymm5, ymm1, xmmword ptr [r14+r13*1+0x40], 0x2
| 2 | | | | 1.0 1.0 | | 1.0 | | | CP | vinserti128 ymm6, ymm1, xmmword ptr [r14+r13*1+0x50], 0x2
| 2 | 1.0 | | 1.0 1.0 | | | | | | CP | vinserti128 ymm7, ymm1, xmmword ptr [r14+r13*1+0x60], 0x2
| 2 | | 1.0 | | 1.0 1.0 | | | | | CP | vinserti128 ymm8, ymm1, xmmword ptr [r14+r13*1+0x70], 0x2
| 2 | | | 1.0 1.0 | | | 1.0 | | | CP | vinserti128 ymm9, ymm1, xmmword ptr [r14+r13*1+0x80], 0x2
| 2 | 1.0 | | | 1.0 1.0 | | | | | CP | vinserti128 ymm10, ymm1, xmmword ptr [r14+r13*1+0x90], 0x2
| 2 | | 1.0 | 1.0 1.0 | | | | | | CP | vinserti128 ymm11, ymm1, xmmword ptr [r14+r13*1+0xa0], 0x2
| 2 | | | | 1.0 1.0 | | 1.0 | | | CP | vinserti128 ymm12, ymm1, xmmword ptr [r14+r13*1+0xb0], 0x2
Total Num Of Uops: 24
With the -no_interiteration flag
Throughput Analysis Report
--------------------------
Block Throughput: 0.50 Cycles Throughput Bottleneck: PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.3 0.0 | 0.3 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.3 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 2^ | 0.3 | 0.3 | 0.5 0.5 | 0.5 0.5 | | 0.3 | | | CP | vinserti128 ymm0, ymm1, xmmword ptr [r14], 0x2
Total Num Of Uops: 2