IMUL (R32, R32) - Throughput and Uops (IACA 3.0)
With different registers for different operands
With 1 independent instruction
Throughput Analysis Report
--------------------------
Block Throughput: 2.95 Cycles Throughput Bottleneck: Backend
Loop Count: 69
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | imul r8d, r9d
Total Num Of Uops: 1
With 12 independent instructions
Throughput Analysis Report
--------------------------
Block Throughput: 11.95 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 12.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | imul r8d, r9d
| 1 | | 1.0 | | | | | | | imul r10d, r9d
| 1 | | 1.0 | | | | | | | imul r11d, r9d
| 1 | | 1.0 | | | | | | | imul r12d, r9d
| 1 | | 1.0 | | | | | | | imul r13d, r9d
| 1 | | 1.0 | | | | | | | imul r14d, r9d
| 1 | | 1.0 | | | | | | | imul ebx, r9d
| 1 | | 1.0 | | | | | | | imul ecx, r9d
| 1 | | 1.0 | | | | | | | imul edx, r9d
| 1 | | 1.0 | | | | | | | imul edi, r9d
| 1 | | 1.0 | | | | | | | imul esi, r9d
| 1 | | 1.0 | | | | | | | imul ebp, r9d
Total Num Of Uops: 12
With the same register for for different operands
Throughput Analysis Report
--------------------------
Block Throughput: 2.95 Cycles Throughput Bottleneck: Backend
Loop Count: 69
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | imul r8d, r8d
Total Num Of Uops: 1