RDTSC - Throughput and Uops

With unroll_count=500 and no inner loop

Code:
```
   0:	0f 31                	rdtsc
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 32.0
- Reference cycles: 22.62
- UOPS_EXECUTED.THREAD: 17.0
- RETIRE_SLOTS: 21.0
- UOPS_MITE: 2.0
- UOPS_MS: 19.0
- UOPS_DISPATCHED.INT_EU_ALL: 17.0
- UOPS_DISPATCHED.ALU: 6.0
- UOPS_DISPATCHED.SLOW: 3.0
- UOPS_DISPATCHED.STD: 0.0
- UOPS_DISPATCHED.SHIFT: 2.0
- UOPS_DISPATCHED.JMP: 4.0
- UOPS_DISPATCHED.STA: 0.0
- UOPS_DISPATCHED.V0: 0.0
- UOPS_DISPATCHED.V1: 0.0
- UOPS_DISPATCHED.V2: 0.0
- UOPS_DISPATCHED.V3: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	0f 31                	rdtsc
   2:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 30.0
- Reference cycles: 21.21
- UOPS_EXECUTED.THREAD: 17.0
- RETIRE_SLOTS: 22.0
- UOPS_MITE: 3.0
- UOPS_MS: 19.0
- UOPS_DISPATCHED.INT_EU_ALL: 17.0
- UOPS_DISPATCHED.ALU: 6.0
- UOPS_DISPATCHED.SLOW: 3.0
- UOPS_DISPATCHED.STD: 0.0
- UOPS_DISPATCHED.SHIFT: 2.0
- UOPS_DISPATCHED.JMP: 4.0
- UOPS_DISPATCHED.STA: 0.0
- UOPS_DISPATCHED.V0: 0.0
- UOPS_DISPATCHED.V1: 0.0
- UOPS_DISPATCHED.V2: 0.0
- UOPS_DISPATCHED.V3: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:
```
   0:	0f 31                	rdtsc
```
Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 31.6
- Reference cycles: 22.28
- UOPS_EXECUTED.THREAD: 17.1
- RETIRE_SLOTS: 21.1
- UOPS_MITE: 2.1
- UOPS_MS: 19.02
- UOPS_DISPATCHED.INT_EU_ALL: 17.1
- UOPS_DISPATCHED.ALU: 6.0
- UOPS_DISPATCHED.SLOW: 3.0
- UOPS_DISPATCHED.STD: 0.0
- UOPS_DISPATCHED.SHIFT: 2.0
- UOPS_DISPATCHED.JMP: 4.1
- UOPS_DISPATCHED.STA: 0.0
- UOPS_DISPATCHED.V0: 0.0
- UOPS_DISPATCHED.V1: 0.0
- UOPS_DISPATCHED.V2: 0.0
- UOPS_DISPATCHED.V3: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.1

With loop_count=100 and unroll_count=100

Code:
```
   0:	0f 31                	rdtsc
```
Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 31.96
- Reference cycles: 22.53
- UOPS_EXECUTED.THREAD: 17.01
- RETIRE_SLOTS: 21.01
- UOPS_MITE: 2.01
- UOPS_MS: 19.0
- UOPS_DISPATCHED.INT_EU_ALL: 17.01
- UOPS_DISPATCHED.ALU: 6.0
- UOPS_DISPATCHED.SLOW: 3.0
- UOPS_DISPATCHED.STD: 0.0
- UOPS_DISPATCHED.SHIFT: 2.0
- UOPS_DISPATCHED.JMP: 4.01
- UOPS_DISPATCHED.STA: 0.0
- UOPS_DISPATCHED.V0: 0.0
- UOPS_DISPATCHED.V1: 0.0
- UOPS_DISPATCHED.V2: 0.0
- UOPS_DISPATCHED.V3: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.01