VSQRTSD (XMM, XMM, XMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 4.5
  • Reference cycles: 3.36
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 1.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 4.5
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.17

With unroll_count=500 and no inner loop

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	0f ae e8             	lfence 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 26.0
  • Reference cycles: 19.62
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 1.03
  • UOPS_MS: 4.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 7.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 4.5
  • Reference cycles: 3.39
  • UOPS_EXECUTED.THREAD: 1.1
  • RETIRE_SLOTS: 1.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 4.5
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 4.5
  • Reference cycles: 3.39
  • UOPS_EXECUTED.THREAD: 1.01
  • RETIRE_SLOTS: 1.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 4.5
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With unroll_count=200 and no inner loop

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 18.0
  • Reference cycles: 13.68
  • UOPS_EXECUTED.THREAD: 4.02
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.05
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 18.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.71

With loop_count=1000 and unroll_count=2

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 18.01
  • Reference cycles: 13.54
  • UOPS_EXECUTED.THREAD: 4.5
  • RETIRE_SLOTS: 4.5
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 18.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 18.01
  • Reference cycles: 13.54
  • UOPS_EXECUTED.THREAD: 4.05
  • RETIRE_SLOTS: 4.05
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 18.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With unroll_count=100 and no inner loop

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
    10:	c5 f3 51 f0          	vsqrtsd xmm6,xmm1,xmm0
    14:	c5 f3 51 f8          	vsqrtsd xmm7,xmm1,xmm0
    18:	c5 73 51 c0          	vsqrtsd xmm8,xmm1,xmm0
    1c:	c5 73 51 c8          	vsqrtsd xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 36.0
  • Reference cycles: 27.04
  • UOPS_EXECUTED.THREAD: 8.04
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 36.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.42

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
    10:	c5 f3 51 f0          	vsqrtsd xmm6,xmm1,xmm0
    14:	c5 f3 51 f8          	vsqrtsd xmm7,xmm1,xmm0
    18:	c5 73 51 c0          	vsqrtsd xmm8,xmm1,xmm0
    1c:	c5 73 51 c8          	vsqrtsd xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 36.01
  • Reference cycles: 27.1
  • UOPS_EXECUTED.THREAD: 9.0
  • RETIRE_SLOTS: 9.01
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 36.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
    10:	c5 f3 51 f0          	vsqrtsd xmm6,xmm1,xmm0
    14:	c5 f3 51 f8          	vsqrtsd xmm7,xmm1,xmm0
    18:	c5 73 51 c0          	vsqrtsd xmm8,xmm1,xmm0
    1c:	c5 73 51 c8          	vsqrtsd xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3ff0000000000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 36.01
  • Reference cycles: 27.14
  • UOPS_EXECUTED.THREAD: 8.1
  • RETIRE_SLOTS: 8.1
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 36.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=500 and no inner loop

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 6.0
  • Reference cycles: 4.54
  • UOPS_EXECUTED.THREAD: 1.0
  • RETIRE_SLOTS: 1.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.18

With unroll_count=500 and no inner loop

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	0f ae e8             	lfence 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 31.0
  • Reference cycles: 23.33
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 1.0
  • UOPS_MS: 4.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 12.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 6.0
  • Reference cycles: 4.51
  • UOPS_EXECUTED.THREAD: 1.1
  • RETIRE_SLOTS: 1.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 6.0
  • Reference cycles: 4.52
  • UOPS_EXECUTED.THREAD: 1.01
  • RETIRE_SLOTS: 1.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 6.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With unroll_count=200 and no inner loop

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 24.0
  • Reference cycles: 17.92
  • UOPS_EXECUTED.THREAD: 3.98
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.71

With loop_count=1000 and unroll_count=2

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 24.01
  • Reference cycles: 18.06
  • UOPS_EXECUTED.THREAD: 4.5
  • RETIRE_SLOTS: 4.5
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 24.01
  • Reference cycles: 18.06
  • UOPS_EXECUTED.THREAD: 4.05
  • RETIRE_SLOTS: 4.05
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 24.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With unroll_count=100 and no inner loop

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
    10:	c5 f3 51 f0          	vsqrtsd xmm6,xmm1,xmm0
    14:	c5 f3 51 f8          	vsqrtsd xmm7,xmm1,xmm0
    18:	c5 73 51 c0          	vsqrtsd xmm8,xmm1,xmm0
    1c:	c5 73 51 c8          	vsqrtsd xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 48.0
  • Reference cycles: 35.84
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 7.99
  • UOPS_MITE: 7.78
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.42

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
    10:	c5 f3 51 f0          	vsqrtsd xmm6,xmm1,xmm0
    14:	c5 f3 51 f8          	vsqrtsd xmm7,xmm1,xmm0
    18:	c5 73 51 c0          	vsqrtsd xmm8,xmm1,xmm0
    1c:	c5 73 51 c8          	vsqrtsd xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 48.01
  • Reference cycles: 36.11
  • UOPS_EXECUTED.THREAD: 9.0
  • RETIRE_SLOTS: 9.01
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 f3 51 d0          	vsqrtsd xmm2,xmm1,xmm0
     4:	c5 f3 51 d8          	vsqrtsd xmm3,xmm1,xmm0
     8:	c5 f3 51 e0          	vsqrtsd xmm4,xmm1,xmm0
     c:	c5 f3 51 e8          	vsqrtsd xmm5,xmm1,xmm0
    10:	c5 f3 51 f0          	vsqrtsd xmm6,xmm1,xmm0
    14:	c5 f3 51 f8          	vsqrtsd xmm7,xmm1,xmm0
    18:	c5 73 51 c0          	vsqrtsd xmm8,xmm1,xmm0
    1c:	c5 73 51 c8          	vsqrtsd xmm9,xmm1,xmm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x465a61fe1acdc21c;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 48.01
  • Reference cycles: 36.13
  • UOPS_EXECUTED.THREAD: 8.1
  • RETIRE_SLOTS: 8.1
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 0.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 48.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01