VPINSRQ (XMM, XMM, R64, I8) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.08
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 1.96
  • UOPS_MS: 0.11
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.93
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.07
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.98

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.04
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.96
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.05
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.08
  • Reference cycles: 0.83
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.92
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.08
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.07
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 4.98
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.92
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.08
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.99

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 5 NOPs

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
     a:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 2.0
  • Reference cycles: 1.44
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 7.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.83
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.17
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.99

With loop_count=1000 and unroll_count=10

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.07
  • Reference cycles: 0.8
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.93
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.07
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.07
  • Reference cycles: 0.8
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.94
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.06
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.28
  • Reference cycles: 3.28
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 7.9
  • UOPS_MS: 0.28
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 3.74
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.25
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 3.96

With loop_count=1000 and unroll_count=2

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.27
  • Reference cycles: 3.22
  • UOPS_EXECUTED.THREAD: 8.5
  • RETIRE_SLOTS: 8.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 3.73
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.26
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.27
  • Reference cycles: 3.22
  • UOPS_EXECUTED.THREAD: 8.05
  • RETIRE_SLOTS: 8.05
  • UOPS_MITE: 0.07
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 3.74
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.26
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.03

With unroll_count=100 and no inner loop

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
    18:	c4 c3 f1 22 e8 02    	vpinsrq xmm5,xmm1,r8,0x2
    1e:	c4 c3 f1 22 f0 02    	vpinsrq xmm6,xmm1,r8,0x2
    24:	c4 c3 f1 22 f8 02    	vpinsrq xmm7,xmm1,r8,0x2
    2a:	c4 43 f1 22 c0 02    	vpinsrq xmm8,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.56
  • Reference cycles: 6.4
  • UOPS_EXECUTED.THREAD: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 15.82
  • UOPS_MS: 0.56
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 7.49
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.5
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.92

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
    18:	c4 c3 f1 22 e8 02    	vpinsrq xmm5,xmm1,r8,0x2
    1e:	c4 c3 f1 22 f0 02    	vpinsrq xmm6,xmm1,r8,0x2
    24:	c4 c3 f1 22 f8 02    	vpinsrq xmm7,xmm1,r8,0x2
    2a:	c4 43 f1 22 c0 02    	vpinsrq xmm8,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.53
  • Reference cycles: 6.43
  • UOPS_EXECUTED.THREAD: 17.0
  • RETIRE_SLOTS: 17.0
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.05
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 7.47
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.53
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
    18:	c4 c3 f1 22 e8 02    	vpinsrq xmm5,xmm1,r8,0x2
    1e:	c4 c3 f1 22 f0 02    	vpinsrq xmm6,xmm1,r8,0x2
    24:	c4 c3 f1 22 f8 02    	vpinsrq xmm7,xmm1,r8,0x2
    2a:	c4 43 f1 22 c0 02    	vpinsrq xmm8,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.53
  • Reference cycles: 6.38
  • UOPS_EXECUTED.THREAD: 16.1
  • RETIRE_SLOTS: 16.11
  • UOPS_MITE: 0.14
  • UOPS_MS: 0.05
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 7.48
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.52
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.07

With unroll_count=100 and no inner loop

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
    18:	c4 c3 f1 22 e8 02    	vpinsrq xmm5,xmm1,r8,0x2
    1e:	c4 c3 f1 22 f0 02    	vpinsrq xmm6,xmm1,r8,0x2
    24:	c4 c3 f1 22 f8 02    	vpinsrq xmm7,xmm1,r8,0x2
    2a:	c4 43 f1 22 c0 02    	vpinsrq xmm8,xmm1,r8,0x2
    30:	c4 43 f1 22 c8 02    	vpinsrq xmm9,xmm1,r8,0x2
    36:	c4 43 f1 22 d0 02    	vpinsrq xmm10,xmm1,r8,0x2
    3c:	c4 43 f1 22 d8 02    	vpinsrq xmm11,xmm1,r8,0x2
    42:	c4 43 f1 22 e0 02    	vpinsrq xmm12,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 12.77
  • Reference cycles: 9.6
  • UOPS_EXECUTED.THREAD: 24.0
  • RETIRE_SLOTS: 24.0
  • UOPS_MITE: 23.79
  • UOPS_MS: 0.56
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 11.29
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 12.72
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 11.92

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
    18:	c4 c3 f1 22 e8 02    	vpinsrq xmm5,xmm1,r8,0x2
    1e:	c4 c3 f1 22 f0 02    	vpinsrq xmm6,xmm1,r8,0x2
    24:	c4 c3 f1 22 f8 02    	vpinsrq xmm7,xmm1,r8,0x2
    2a:	c4 43 f1 22 c0 02    	vpinsrq xmm8,xmm1,r8,0x2
    30:	c4 43 f1 22 c8 02    	vpinsrq xmm9,xmm1,r8,0x2
    36:	c4 43 f1 22 d0 02    	vpinsrq xmm10,xmm1,r8,0x2
    3c:	c4 43 f1 22 d8 02    	vpinsrq xmm11,xmm1,r8,0x2
    42:	c4 43 f1 22 e0 02    	vpinsrq xmm12,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 14.0
  • Core cycles: 12.84
  • Reference cycles: 9.66
  • UOPS_EXECUTED.THREAD: 25.0
  • RETIRE_SLOTS: 25.0
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.06
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 11.17
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 12.83
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2
     6:	c4 c3 f1 22 d0 02    	vpinsrq xmm2,xmm1,r8,0x2
     c:	c4 c3 f1 22 d8 02    	vpinsrq xmm3,xmm1,r8,0x2
    12:	c4 c3 f1 22 e0 02    	vpinsrq xmm4,xmm1,r8,0x2
    18:	c4 c3 f1 22 e8 02    	vpinsrq xmm5,xmm1,r8,0x2
    1e:	c4 c3 f1 22 f0 02    	vpinsrq xmm6,xmm1,r8,0x2
    24:	c4 c3 f1 22 f8 02    	vpinsrq xmm7,xmm1,r8,0x2
    2a:	c4 43 f1 22 c0 02    	vpinsrq xmm8,xmm1,r8,0x2
    30:	c4 43 f1 22 c8 02    	vpinsrq xmm9,xmm1,r8,0x2
    36:	c4 43 f1 22 d0 02    	vpinsrq xmm10,xmm1,r8,0x2
    3c:	c4 43 f1 22 d8 02    	vpinsrq xmm11,xmm1,r8,0x2
    42:	c4 43 f1 22 e0 02    	vpinsrq xmm12,xmm1,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM1, XMM1, XMM1

• Show nanoBench command
• Results:
  • Instructions retired: 12.2
  • Core cycles: 12.76
  • Reference cycles: 9.6
  • UOPS_EXECUTED.THREAD: 24.1
  • RETIRE_SLOTS: 24.1
  • UOPS_MITE: 0.24
  • UOPS_MS: 0.06
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 11.24
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 12.76
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.12

With unroll_count=500 and no inner loop

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.38
  • Reference cycles: 0.99
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 1.96
  • UOPS_MS: 0.11
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.75
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.26
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.98

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.51
  • Reference cycles: 1.15
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 2.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.59
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.41
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.49
  • Reference cycles: 1.09
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 3.95
  • UOPS_MS: 0.11
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.65
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.34
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.98

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.7
  • Reference cycles: 1.22
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.53
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.47
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 1.0
  • Reference cycles: 0.74
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 5.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 5 NOPs

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
     a:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 2.0
  • Reference cycles: 1.47
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 6.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.84
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.16
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.6
  • Reference cycles: 1.21
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.56
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.44
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.6
  • Reference cycles: 1.21
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 0.56
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.44
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.2
  • Reference cycles: 3.12
  • UOPS_EXECUTED.THREAD: 8.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 7.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 3.79
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.22
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.27
  • Reference cycles: 3.22
  • UOPS_EXECUTED.THREAD: 8.5
  • RETIRE_SLOTS: 8.5
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 3.74
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.27
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.27
  • Reference cycles: 3.21
  • UOPS_EXECUTED.THREAD: 8.05
  • RETIRE_SLOTS: 8.05
  • UOPS_MITE: 0.07
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 3.74
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.26
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.03

With unroll_count=100 and no inner loop

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
    18:	c4 c3 d9 22 e0 02    	vpinsrq xmm4,xmm4,r8,0x2
    1e:	c4 c3 d1 22 e8 02    	vpinsrq xmm5,xmm5,r8,0x2
    24:	c4 c3 c9 22 f0 02    	vpinsrq xmm6,xmm6,r8,0x2
    2a:	c4 c3 c1 22 f8 02    	vpinsrq xmm7,xmm7,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3;
  VXORPS XMM4, XMM4, XMM4;
  VXORPS XMM5, XMM5, XMM5;
  VXORPS XMM6, XMM6, XMM6;
  VXORPS XMM7, XMM7, XMM7

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.57
  • Reference cycles: 6.24
  • UOPS_EXECUTED.THREAD: 16.02
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 15.79
  • UOPS_MS: 0.56
  • UOPS_PORT_0: 0.01
  • UOPS_PORT_1: 7.51
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.49
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.9

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
    18:	c4 c3 d9 22 e0 02    	vpinsrq xmm4,xmm4,r8,0x2
    1e:	c4 c3 d1 22 e8 02    	vpinsrq xmm5,xmm5,r8,0x2
    24:	c4 c3 c9 22 f0 02    	vpinsrq xmm6,xmm6,r8,0x2
    2a:	c4 c3 c1 22 f8 02    	vpinsrq xmm7,xmm7,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3;
  VXORPS XMM4, XMM4, XMM4;
  VXORPS XMM5, XMM5, XMM5;
  VXORPS XMM6, XMM6, XMM6;
  VXORPS XMM7, XMM7, XMM7

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.54
  • Reference cycles: 6.43
  • UOPS_EXECUTED.THREAD: 17.0
  • RETIRE_SLOTS: 17.0
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.05
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 7.48
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.53
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
    18:	c4 c3 d9 22 e0 02    	vpinsrq xmm4,xmm4,r8,0x2
    1e:	c4 c3 d1 22 e8 02    	vpinsrq xmm5,xmm5,r8,0x2
    24:	c4 c3 c9 22 f0 02    	vpinsrq xmm6,xmm6,r8,0x2
    2a:	c4 c3 c1 22 f8 02    	vpinsrq xmm7,xmm7,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3;
  VXORPS XMM4, XMM4, XMM4;
  VXORPS XMM5, XMM5, XMM5;
  VXORPS XMM6, XMM6, XMM6;
  VXORPS XMM7, XMM7, XMM7

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.54
  • Reference cycles: 6.42
  • UOPS_EXECUTED.THREAD: 16.1
  • RETIRE_SLOTS: 16.11
  • UOPS_MITE: 0.14
  • UOPS_MS: 0.05
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 7.48
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.52
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.07

With unroll_count=100 and no inner loop

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
    18:	c4 c3 d9 22 e0 02    	vpinsrq xmm4,xmm4,r8,0x2
    1e:	c4 c3 d1 22 e8 02    	vpinsrq xmm5,xmm5,r8,0x2
    24:	c4 c3 c9 22 f0 02    	vpinsrq xmm6,xmm6,r8,0x2
    2a:	c4 c3 c1 22 f8 02    	vpinsrq xmm7,xmm7,r8,0x2
    30:	c4 43 b9 22 c0 02    	vpinsrq xmm8,xmm8,r8,0x2
    36:	c4 43 b1 22 c8 02    	vpinsrq xmm9,xmm9,r8,0x2
    3c:	c4 43 a9 22 d0 02    	vpinsrq xmm10,xmm10,r8,0x2
    42:	c4 43 a1 22 d8 02    	vpinsrq xmm11,xmm11,r8,0x2
    48:	c4 43 99 22 e0 02    	vpinsrq xmm12,xmm12,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3;
  VXORPS XMM4, XMM4, XMM4;
  VXORPS XMM5, XMM5, XMM5;
  VXORPS XMM6, XMM6, XMM6;
  VXORPS XMM7, XMM7, XMM7;
  VXORPS XMM8, XMM8, XMM8;
  VXORPS XMM9, XMM9, XMM9;
  VXORPS XMM10, XMM10, XMM10;
  VXORPS XMM11, XMM11, XMM11;
  VXORPS XMM12, XMM12, XMM12

• Show nanoBench command
• Results:
  • Instructions retired: 13.0
  • Core cycles: 13.82
  • Reference cycles: 10.4
  • UOPS_EXECUTED.THREAD: 25.99
  • RETIRE_SLOTS: 26.0
  • UOPS_MITE: 25.78
  • UOPS_MS: 0.56
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 12.22
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 13.78
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 12.91

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
    18:	c4 c3 d9 22 e0 02    	vpinsrq xmm4,xmm4,r8,0x2
    1e:	c4 c3 d1 22 e8 02    	vpinsrq xmm5,xmm5,r8,0x2
    24:	c4 c3 c9 22 f0 02    	vpinsrq xmm6,xmm6,r8,0x2
    2a:	c4 c3 c1 22 f8 02    	vpinsrq xmm7,xmm7,r8,0x2
    30:	c4 43 b9 22 c0 02    	vpinsrq xmm8,xmm8,r8,0x2
    36:	c4 43 b1 22 c8 02    	vpinsrq xmm9,xmm9,r8,0x2
    3c:	c4 43 a9 22 d0 02    	vpinsrq xmm10,xmm10,r8,0x2
    42:	c4 43 a1 22 d8 02    	vpinsrq xmm11,xmm11,r8,0x2
    48:	c4 43 99 22 e0 02    	vpinsrq xmm12,xmm12,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3;
  VXORPS XMM4, XMM4, XMM4;
  VXORPS XMM5, XMM5, XMM5;
  VXORPS XMM6, XMM6, XMM6;
  VXORPS XMM7, XMM7, XMM7;
  VXORPS XMM8, XMM8, XMM8;
  VXORPS XMM9, XMM9, XMM9;
  VXORPS XMM10, XMM10, XMM10;
  VXORPS XMM11, XMM11, XMM11;
  VXORPS XMM12, XMM12, XMM12

• Show nanoBench command
• Results:
  • Instructions retired: 15.0
  • Core cycles: 13.88
  • Reference cycles: 10.42
  • UOPS_EXECUTED.THREAD: 27.0
  • RETIRE_SLOTS: 27.0
  • UOPS_MITE: 0.05
  • UOPS_MS: 0.06
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 12.09
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 13.88
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 c3 f9 22 c0 02    	vpinsrq xmm0,xmm0,r8,0x2
     6:	c4 c3 f1 22 c8 02    	vpinsrq xmm1,xmm1,r8,0x2
     c:	c4 c3 e9 22 d0 02    	vpinsrq xmm2,xmm2,r8,0x2
    12:	c4 c3 e1 22 d8 02    	vpinsrq xmm3,xmm3,r8,0x2
    18:	c4 c3 d9 22 e0 02    	vpinsrq xmm4,xmm4,r8,0x2
    1e:	c4 c3 d1 22 e8 02    	vpinsrq xmm5,xmm5,r8,0x2
    24:	c4 c3 c9 22 f0 02    	vpinsrq xmm6,xmm6,r8,0x2
    2a:	c4 c3 c1 22 f8 02    	vpinsrq xmm7,xmm7,r8,0x2
    30:	c4 43 b9 22 c0 02    	vpinsrq xmm8,xmm8,r8,0x2
    36:	c4 43 b1 22 c8 02    	vpinsrq xmm9,xmm9,r8,0x2
    3c:	c4 43 a9 22 d0 02    	vpinsrq xmm10,xmm10,r8,0x2
    42:	c4 43 a1 22 d8 02    	vpinsrq xmm11,xmm11,r8,0x2
    48:	c4 43 99 22 e0 02    	vpinsrq xmm12,xmm12,r8,0x2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS XMM0, XMM0, XMM0;
  VXORPS XMM1, XMM1, XMM1;
  VXORPS XMM2, XMM2, XMM2;
  VXORPS XMM3, XMM3, XMM3;
  VXORPS XMM4, XMM4, XMM4;
  VXORPS XMM5, XMM5, XMM5;
  VXORPS XMM6, XMM6, XMM6;
  VXORPS XMM7, XMM7, XMM7;
  VXORPS XMM8, XMM8, XMM8;
  VXORPS XMM9, XMM9, XMM9;
  VXORPS XMM10, XMM10, XMM10;
  VXORPS XMM11, XMM11, XMM11;
  VXORPS XMM12, XMM12, XMM12

• Show nanoBench command
• Results:
  • Instructions retired: 13.2
  • Core cycles: 13.86
  • Reference cycles: 10.4
  • UOPS_EXECUTED.THREAD: 26.1
  • RETIRE_SLOTS: 26.1
  • UOPS_MITE: 0.25
  • UOPS_MS: 0.06
  • UOPS_PORT_0: 0.0
  • UOPS_PORT_1: 12.15
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 13.84
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.13