VDIVPS (ZMM, ZMM, ZMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 10.0
  • Reference cycles: 7.42
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 10.0
  • Reference cycles: 7.55
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 10.0
  • Reference cycles: 7.49
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 10.0
  • Reference cycles: 7.55
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 10.0
  • Reference cycles: 7.62
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 6.97
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With unroll_count=500 and no inner loop

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	0f ae e8             	lfence 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 30.0
  • Reference cycles: 22.66
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 4.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 10.0
  • Reference cycles: 7.53
  • UOPS_EXECUTED.THREAD: 3.1
  • RETIRE_SLOTS: 3.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 10.0
  • Reference cycles: 7.52
  • UOPS_EXECUTED.THREAD: 3.01
  • RETIRE_SLOTS: 3.01
  • UOPS_MITE: 3.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=200 and no inner loop

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 40.0
  • Reference cycles: 30.16
  • UOPS_EXECUTED.THREAD: 12.0
  • RETIRE_SLOTS: 12.0
  • UOPS_MITE: 12.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 40.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 40.01
  • Reference cycles: 30.11
  • UOPS_EXECUTED.THREAD: 12.5
  • RETIRE_SLOTS: 12.5
  • UOPS_MITE: 0.85
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 40.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.14

With loop_count=100 and unroll_count=20

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 40.0
  • Reference cycles: 30.1
  • UOPS_EXECUTED.THREAD: 12.05
  • RETIRE_SLOTS: 12.05
  • UOPS_MITE: 12.04
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 40.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With unroll_count=100 and no inner loop

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
    18:	62 f1 7c 48 5e f1    	vdivps zmm6,zmm0,zmm1
    1e:	62 f1 7c 48 5e f9    	vdivps zmm7,zmm0,zmm1
    24:	62 71 7c 48 5e c1    	vdivps zmm8,zmm0,zmm1
    2a:	62 71 7c 48 5e c9    	vdivps zmm9,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 80.0
  • Reference cycles: 60.0
  • UOPS_EXECUTED.THREAD: 24.0
  • RETIRE_SLOTS: 24.0
  • UOPS_MITE: 24.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 80.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
    18:	62 f1 7c 48 5e f1    	vdivps zmm6,zmm0,zmm1
    1e:	62 f1 7c 48 5e f9    	vdivps zmm7,zmm0,zmm1
    24:	62 71 7c 48 5e c1    	vdivps zmm8,zmm0,zmm1
    2a:	62 71 7c 48 5e c9    	vdivps zmm9,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 80.01
  • Reference cycles: 60.18
  • UOPS_EXECUTED.THREAD: 25.0
  • RETIRE_SLOTS: 25.0
  • UOPS_MITE: 0.71
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 80.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.36

With loop_count=100 and unroll_count=10

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
    18:	62 f1 7c 48 5e f1    	vdivps zmm6,zmm0,zmm1
    1e:	62 f1 7c 48 5e f9    	vdivps zmm7,zmm0,zmm1
    24:	62 71 7c 48 5e c1    	vdivps zmm8,zmm0,zmm1
    2a:	62 71 7c 48 5e c9    	vdivps zmm9,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 80.01
  • Reference cycles: 60.21
  • UOPS_EXECUTED.THREAD: 24.1
  • RETIRE_SLOTS: 24.1
  • UOPS_MITE: 24.08
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 80.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.99

With unroll_count=500 and no inner loop

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 10.0
  • Reference cycles: 7.55
  • UOPS_EXECUTED.THREAD: 3.01
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 10.0
  • Reference cycles: 7.55
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 10.0
  • Reference cycles: 7.55
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 10.0
  • Reference cycles: 7.55
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 5.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 10.0
  • Reference cycles: 7.52
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 7.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With unroll_count=500 and no inner loop

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	0f ae e8             	lfence 
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 30.0
  • Reference cycles: 22.56
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 4.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 10.0
  • Reference cycles: 7.52
  • UOPS_EXECUTED.THREAD: 3.1
  • RETIRE_SLOTS: 3.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 10.0
  • Reference cycles: 7.52
  • UOPS_EXECUTED.THREAD: 3.01
  • RETIRE_SLOTS: 3.01
  • UOPS_MITE: 3.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 10.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=200 and no inner loop

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 40.0
  • Reference cycles: 30.0
  • UOPS_EXECUTED.THREAD: 12.0
  • RETIRE_SLOTS: 12.0
  • UOPS_MITE: 12.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 40.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 40.0
  • Reference cycles: 30.1
  • UOPS_EXECUTED.THREAD: 12.5
  • RETIRE_SLOTS: 12.5
  • UOPS_MITE: 0.64
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 40.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.18

With loop_count=100 and unroll_count=20

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 40.0
  • Reference cycles: 30.1
  • UOPS_EXECUTED.THREAD: 12.05
  • RETIRE_SLOTS: 12.05
  • UOPS_MITE: 12.04
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 40.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With unroll_count=100 and no inner loop

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
    18:	62 f1 7c 48 5e f1    	vdivps zmm6,zmm0,zmm1
    1e:	62 f1 7c 48 5e f9    	vdivps zmm7,zmm0,zmm1
    24:	62 71 7c 48 5e c1    	vdivps zmm8,zmm0,zmm1
    2a:	62 71 7c 48 5e c9    	vdivps zmm9,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 80.0
  • Reference cycles: 59.84
  • UOPS_EXECUTED.THREAD: 24.01
  • RETIRE_SLOTS: 24.0
  • UOPS_MITE: 23.95
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 80.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
    18:	62 f1 7c 48 5e f1    	vdivps zmm6,zmm0,zmm1
    1e:	62 f1 7c 48 5e f9    	vdivps zmm7,zmm0,zmm1
    24:	62 71 7c 48 5e c1    	vdivps zmm8,zmm0,zmm1
    2a:	62 71 7c 48 5e c9    	vdivps zmm9,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 80.01
  • Reference cycles: 60.24
  • UOPS_EXECUTED.THREAD: 25.0
  • RETIRE_SLOTS: 25.0
  • UOPS_MITE: 0.58
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 80.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.11

With loop_count=100 and unroll_count=10

• Code:

     0:	62 f1 7c 48 5e d1    	vdivps zmm2,zmm0,zmm1
     6:	62 f1 7c 48 5e d9    	vdivps zmm3,zmm0,zmm1
     c:	62 f1 7c 48 5e e1    	vdivps zmm4,zmm0,zmm1
    12:	62 f1 7c 48 5e e9    	vdivps zmm5,zmm0,zmm1
    18:	62 f1 7c 48 5e f1    	vdivps zmm6,zmm0,zmm1
    1e:	62 f1 7c 48 5e f9    	vdivps zmm7,zmm0,zmm1
    24:	62 71 7c 48 5e c1    	vdivps zmm8,zmm0,zmm1
    2a:	62 71 7c 48 5e c9    	vdivps zmm9,zmm0,zmm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS ZMM0, [R14+64];
  VMOVUPS ZMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 80.01
  • Reference cycles: 60.19
  • UOPS_EXECUTED.THREAD: 24.1
  • RETIRE_SLOTS: 24.1
  • UOPS_MITE: 24.08
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 80.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.99