VCVTPS2PD (ZMM, YMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.74
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 4.97
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 5 NOPs

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
     a:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 2.0
  • Reference cycles: 1.5
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 6.93
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.75
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.0
  • Reference cycles: 0.75
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.0
  • Reference cycles: 3.2
  • UOPS_EXECUTED.THREAD: 7.99
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 8.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.01
  • Reference cycles: 3.0
  • UOPS_EXECUTED.THREAD: 8.5
  • RETIRE_SLOTS: 8.5
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.01
  • Reference cycles: 3.02
  • UOPS_EXECUTED.THREAD: 8.05
  • RETIRE_SLOTS: 8.05
  • UOPS_MITE: 0.06
  • UOPS_MS: 0.01
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.03

With unroll_count=100 and no inner loop

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
    18:	62 f1 7c 48 5a e9    	vcvtps2pd zmm5,ymm1
    1e:	62 f1 7c 48 5a f1    	vcvtps2pd zmm6,ymm1
    24:	62 f1 7c 48 5a f9    	vcvtps2pd zmm7,ymm1
    2a:	62 71 7c 48 5a c1    	vcvtps2pd zmm8,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 6.56
  • UOPS_EXECUTED.THREAD: 15.99
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 15.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.98

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
    18:	62 f1 7c 48 5a e9    	vcvtps2pd zmm5,ymm1
    1e:	62 f1 7c 48 5a f1    	vcvtps2pd zmm6,ymm1
    24:	62 f1 7c 48 5a f9    	vcvtps2pd zmm7,ymm1
    2a:	62 71 7c 48 5a c1    	vcvtps2pd zmm8,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.01
  • Reference cycles: 6.03
  • UOPS_EXECUTED.THREAD: 17.0
  • RETIRE_SLOTS: 17.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
    18:	62 f1 7c 48 5a e9    	vcvtps2pd zmm5,ymm1
    1e:	62 f1 7c 48 5a f1    	vcvtps2pd zmm6,ymm1
    24:	62 f1 7c 48 5a f9    	vcvtps2pd zmm7,ymm1
    2a:	62 71 7c 48 5a c1    	vcvtps2pd zmm8,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.01
  • Reference cycles: 6.05
  • UOPS_EXECUTED.THREAD: 16.1
  • RETIRE_SLOTS: 16.11
  • UOPS_MITE: 0.12
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.06

With unroll_count=100 and no inner loop

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
    18:	62 f1 7c 48 5a e9    	vcvtps2pd zmm5,ymm1
    1e:	62 f1 7c 48 5a f1    	vcvtps2pd zmm6,ymm1
    24:	62 f1 7c 48 5a f9    	vcvtps2pd zmm7,ymm1
    2a:	62 71 7c 48 5a c1    	vcvtps2pd zmm8,ymm1
    30:	62 71 7c 48 5a c9    	vcvtps2pd zmm9,ymm1
    36:	62 71 7c 48 5a d1    	vcvtps2pd zmm10,ymm1
    3c:	62 71 7c 48 5a d9    	vcvtps2pd zmm11,ymm1
    42:	62 71 7c 48 5a e1    	vcvtps2pd zmm12,ymm1
    48:	62 e1 7c 48 5a c1    	vcvtps2pd zmm16,ymm1
    4e:	62 e1 7c 48 5a c9    	vcvtps2pd zmm17,ymm1
    54:	62 e1 7c 48 5a d1    	vcvtps2pd zmm18,ymm1
    5a:	62 e1 7c 48 5a d9    	vcvtps2pd zmm19,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 16.0
  • Reference cycles: 11.84
  • UOPS_EXECUTED.THREAD: 32.01
  • RETIRE_SLOTS: 32.01
  • UOPS_MITE: 32.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 16.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
    18:	62 f1 7c 48 5a e9    	vcvtps2pd zmm5,ymm1
    1e:	62 f1 7c 48 5a f1    	vcvtps2pd zmm6,ymm1
    24:	62 f1 7c 48 5a f9    	vcvtps2pd zmm7,ymm1
    2a:	62 71 7c 48 5a c1    	vcvtps2pd zmm8,ymm1
    30:	62 71 7c 48 5a c9    	vcvtps2pd zmm9,ymm1
    36:	62 71 7c 48 5a d1    	vcvtps2pd zmm10,ymm1
    3c:	62 71 7c 48 5a d9    	vcvtps2pd zmm11,ymm1
    42:	62 71 7c 48 5a e1    	vcvtps2pd zmm12,ymm1
    48:	62 e1 7c 48 5a c1    	vcvtps2pd zmm16,ymm1
    4e:	62 e1 7c 48 5a c9    	vcvtps2pd zmm17,ymm1
    54:	62 e1 7c 48 5a d1    	vcvtps2pd zmm18,ymm1
    5a:	62 e1 7c 48 5a d9    	vcvtps2pd zmm19,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 16.01
  • Reference cycles: 12.03
  • UOPS_EXECUTED.THREAD: 33.0
  • RETIRE_SLOTS: 33.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 16.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	62 f1 7c 48 5a c1    	vcvtps2pd zmm0,ymm1
     6:	62 f1 7c 48 5a d1    	vcvtps2pd zmm2,ymm1
     c:	62 f1 7c 48 5a d9    	vcvtps2pd zmm3,ymm1
    12:	62 f1 7c 48 5a e1    	vcvtps2pd zmm4,ymm1
    18:	62 f1 7c 48 5a e9    	vcvtps2pd zmm5,ymm1
    1e:	62 f1 7c 48 5a f1    	vcvtps2pd zmm6,ymm1
    24:	62 f1 7c 48 5a f9    	vcvtps2pd zmm7,ymm1
    2a:	62 71 7c 48 5a c1    	vcvtps2pd zmm8,ymm1
    30:	62 71 7c 48 5a c9    	vcvtps2pd zmm9,ymm1
    36:	62 71 7c 48 5a d1    	vcvtps2pd zmm10,ymm1
    3c:	62 71 7c 48 5a d9    	vcvtps2pd zmm11,ymm1
    42:	62 71 7c 48 5a e1    	vcvtps2pd zmm12,ymm1
    48:	62 e1 7c 48 5a c1    	vcvtps2pd zmm16,ymm1
    4e:	62 e1 7c 48 5a c9    	vcvtps2pd zmm17,ymm1
    54:	62 e1 7c 48 5a d1    	vcvtps2pd zmm18,ymm1
    5a:	62 e1 7c 48 5a d9    	vcvtps2pd zmm19,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 16.01
  • Reference cycles: 12.05
  • UOPS_EXECUTED.THREAD: 32.1
  • RETIRE_SLOTS: 32.1
  • UOPS_MITE: 0.29
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 16.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.14

With unroll_count=500 and no inner loop

• Code:

     0:	62 f1 7c 48 5a c0    	vcvtps2pd zmm0,ymm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 7.0
  • Reference cycles: 5.38
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 1.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	62 f1 7c 48 5a c0    	vcvtps2pd zmm0,ymm0
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 7.0
  • Reference cycles: 5.38
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 2.99
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	62 f1 7c 48 5a c0    	vcvtps2pd zmm0,ymm0
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 7.0
  • Reference cycles: 5.25
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	62 f1 7c 48 5a c0    	vcvtps2pd zmm0,ymm0
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 7.0
  • Reference cycles: 5.22
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 4.98
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	62 f1 7c 48 5a c0    	vcvtps2pd zmm0,ymm0
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 7.0
  • Reference cycles: 5.38
  • UOPS_EXECUTED.THREAD: 2.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 5 NOPs

• Code:

     0:	62 f1 7c 48 5a c0    	vcvtps2pd zmm0,ymm0
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
     a:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 7.0
  • Reference cycles: 5.12
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 6.94
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	62 f1 7c 48 5a c0    	vcvtps2pd zmm0,ymm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 7.0
  • Reference cycles: 5.27
  • UOPS_EXECUTED.THREAD: 2.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	62 f1 7c 48 5a c0    	vcvtps2pd zmm0,ymm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 7.0
  • Reference cycles: 5.27
  • UOPS_EXECUTED.THREAD: 2.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 0.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01