VBLENDVPD (YMM, YMM, M256, YMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.04
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 2.0
  • Reference cycles: 1.44
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 7.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.88
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.12
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.75
  • UOPS_EXECUTED.THREAD: 4.1
  • RETIRE_SLOTS: 4.1
  • UOPS_MITE: 4.11
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
     d:	0f 1f 84 00 00 00 00 
    14:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 1.0
  • Reference cycles: 0.75
  • UOPS_EXECUTED.THREAD: 4.1
  • RETIRE_SLOTS: 5.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.01
  • Reference cycles: 0.76
  • UOPS_EXECUTED.THREAD: 4.01
  • RETIRE_SLOTS: 4.01
  • UOPS_MITE: 4.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=100, unroll_count=100, and padding (long NOPs)

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
     d:	0f 1f 84 00 00 00 00 
    14:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 1.0
  • Reference cycles: 0.76
  • UOPS_EXECUTED.THREAD: 4.01
  • RETIRE_SLOTS: 5.01
  • UOPS_MITE: 0.05
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.01
  • Reference cycles: 3.04
  • UOPS_EXECUTED.THREAD: 15.99
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 16.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.01

With loop_count=1000 and unroll_count=2

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.03
  • Reference cycles: 3.02
  • UOPS_EXECUTED.THREAD: 16.5
  • RETIRE_SLOTS: 16.5
  • UOPS_MITE: 1.14
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.28

With loop_count=1000, unroll_count=2, and padding (long NOPs)

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 4.01
  • Reference cycles: 3.01
  • UOPS_EXECUTED.THREAD: 16.5
  • RETIRE_SLOTS: 17.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.01
  • Reference cycles: 3.02
  • UOPS_EXECUTED.THREAD: 16.05
  • RETIRE_SLOTS: 16.05
  • UOPS_MITE: 0.17
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With loop_count=100, unroll_count=20, and padding (long NOPs)

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 4.01
  • Reference cycles: 3.02
  • UOPS_EXECUTED.THREAD: 16.05
  • RETIRE_SLOTS: 17.05
  • UOPS_MITE: 0.16
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    22:	00 00 20 
    25:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    2c:	00 00 20 
    2f:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    36:	00 00 20 
    39:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    40:	00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.42
  • Reference cycles: 6.4
  • UOPS_EXECUTED.THREAD: 32.01
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 31.59
  • UOPS_MS: 0.36
  • UOPS_PORT_0: 7.99
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.02
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.92

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    22:	00 00 20 
    25:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    2c:	00 00 20 
    2f:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    36:	00 00 20 
    39:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    40:	00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.03
  • Reference cycles: 6.08
  • UOPS_EXECUTED.THREAD: 33.01
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
    2a:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    31:	00 00 20 
    34:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    3b:	00 00 20 
    3e:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    45:	00 00 20 
    48:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    4f:	00 00 20 
    52:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    59:	0f 1f 84 00 00 00 00 
    60:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 8.03
  • Reference cycles: 6.03
  • UOPS_EXECUTED.THREAD: 33.01
  • RETIRE_SLOTS: 35.01
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    22:	00 00 20 
    25:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    2c:	00 00 20 
    2f:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    36:	00 00 20 
    39:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    40:	00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.03
  • Reference cycles: 6.03
  • UOPS_EXECUTED.THREAD: 32.1
  • RETIRE_SLOTS: 32.1
  • UOPS_MITE: 0.31
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
    2a:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    31:	00 00 20 
    34:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    3b:	00 00 20 
    3e:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    45:	00 00 20 
    48:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    4f:	00 00 20 
    52:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    59:	0f 1f 84 00 00 00 00 
    60:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 10.2
  • Core cycles: 8.01
  • Reference cycles: 6.14
  • UOPS_EXECUTED.THREAD: 32.1
  • RETIRE_SLOTS: 34.1
  • UOPS_MITE: 0.32
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With unroll_count=100 and no inner loop

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    22:	00 00 20 
    25:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    2c:	00 00 20 
    2f:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    36:	00 00 20 
    39:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    40:	00 00 20 
    43:	c4 43 75 4b 96 00 01 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+0x100],ymm2
    4a:	00 00 20 
    4d:	c4 43 75 4b 9e 20 01 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+0x120],ymm2
    54:	00 00 20 
    57:	c4 43 75 4b a6 40 01 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+0x140],ymm2
    5e:	00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 10.99
  • Reference cycles: 7.84
  • UOPS_EXECUTED.THREAD: 44.0
  • RETIRE_SLOTS: 44.0
  • UOPS_MITE: 43.95
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 10.99

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    22:	00 00 20 
    25:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    2c:	00 00 20 
    2f:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    36:	00 00 20 
    39:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    40:	00 00 20 
    43:	c4 43 75 4b 96 00 01 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+0x100],ymm2
    4a:	00 00 20 
    4d:	c4 43 75 4b 9e 20 01 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+0x120],ymm2
    54:	00 00 20 
    57:	c4 43 75 4b a6 40 01 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+0x140],ymm2
    5e:	00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 13.0
  • Core cycles: 11.03
  • Reference cycles: 8.29
  • UOPS_EXECUTED.THREAD: 45.0
  • RETIRE_SLOTS: 45.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.05

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
    2a:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    31:	00 00 20 
    34:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    3b:	00 00 20 
    3e:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    45:	00 00 20 
    48:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    4f:	00 00 20 
    52:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    59:	0f 1f 84 00 00 00 00 
    60:	00 
    61:	c4 43 75 4b 96 00 01 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+0x100],ymm2
    68:	00 00 20 
    6b:	c4 43 75 4b 9e 20 01 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+0x120],ymm2
    72:	00 00 20 
    75:	c4 43 75 4b a6 40 01 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+0x140],ymm2
    7c:	00 00 20 
    7f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    86:	0f 1f 84 00 00 00 00 
    8d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 11.03
  • Reference cycles: 8.29
  • UOPS_EXECUTED.THREAD: 45.01
  • RETIRE_SLOTS: 48.0
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    22:	00 00 20 
    25:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    2c:	00 00 20 
    2f:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    36:	00 00 20 
    39:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    40:	00 00 20 
    43:	c4 43 75 4b 96 00 01 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+0x100],ymm2
    4a:	00 00 20 
    4d:	c4 43 75 4b 9e 20 01 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+0x120],ymm2
    54:	00 00 20 
    57:	c4 43 75 4b a6 40 01 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+0x140],ymm2
    5e:	00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 11.2
  • Core cycles: 11.03
  • Reference cycles: 8.27
  • UOPS_EXECUTED.THREAD: 44.1
  • RETIRE_SLOTS: 44.1
  • UOPS_MITE: 0.42
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.11

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 c3 75 4b 06 20    	vblendvpd ymm0,ymm1,YMMWORD PTR [r14],ymm2
     6:	c4 c3 75 4b 5e 20 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+0x20],ymm2
     d:	c4 c3 75 4b 66 40 20 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+0x40],ymm2
    14:	c4 c3 75 4b 6e 60 20 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+0x60],ymm2
    1b:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    22:	0f 1f 84 00 00 00 00 
    29:	00 
    2a:	c4 c3 75 4b b6 80 00 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+0x80],ymm2
    31:	00 00 20 
    34:	c4 c3 75 4b be a0 00 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+0xa0],ymm2
    3b:	00 00 20 
    3e:	c4 43 75 4b 86 c0 00 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+0xc0],ymm2
    45:	00 00 20 
    48:	c4 43 75 4b 8e e0 00 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+0xe0],ymm2
    4f:	00 00 20 
    52:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    59:	0f 1f 84 00 00 00 00 
    60:	00 
    61:	c4 43 75 4b 96 00 01 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+0x100],ymm2
    68:	00 00 20 
    6b:	c4 43 75 4b 9e 20 01 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+0x120],ymm2
    72:	00 00 20 
    75:	c4 43 75 4b a6 40 01 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+0x140],ymm2
    7c:	00 00 20 
    7f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    86:	0f 1f 84 00 00 00 00 
    8d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 14.2
  • Core cycles: 11.03
  • Reference cycles: 8.26
  • UOPS_EXECUTED.THREAD: 44.1
  • RETIRE_SLOTS: 47.1
  • UOPS_MITE: 0.48
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.11

With unroll_count=500 and no inner loop

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.0
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.74
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 5.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.04
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 6.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 2.0
  • Reference cycles: 1.47
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 7.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 0.9
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.12
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.76
  • UOPS_EXECUTED.THREAD: 4.1
  • RETIRE_SLOTS: 4.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=1000, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
     e:	0f 1f 84 00 00 00 00 
    15:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 1.0
  • Reference cycles: 0.76
  • UOPS_EXECUTED.THREAD: 4.1
  • RETIRE_SLOTS: 5.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.0
  • Reference cycles: 0.76
  • UOPS_EXECUTED.THREAD: 4.01
  • RETIRE_SLOTS: 4.01
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100, unroll_count=100, and padding (long NOPs)

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
     e:	0f 1f 84 00 00 00 00 
    15:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 1.0
  • Reference cycles: 0.75
  • UOPS_EXECUTED.THREAD: 4.01
  • RETIRE_SLOTS: 5.01
  • UOPS_MITE: 0.05
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.0
  • UOPS_PORT_1: 1.0
  • UOPS_PORT_6: 0.01
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 1.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 4.22
  • Reference cycles: 3.04
  • UOPS_EXECUTED.THREAD: 16.0
  • RETIRE_SLOTS: 16.0
  • UOPS_MITE: 15.84
  • UOPS_MS: 0.18
  • UOPS_PORT_0: 3.99
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.01
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 3.96

With loop_count=1000 and unroll_count=2

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 4.01
  • Reference cycles: 3.02
  • UOPS_EXECUTED.THREAD: 16.5
  • RETIRE_SLOTS: 16.5
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=1000, unroll_count=2, and padding (long NOPs)

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 4.01
  • Reference cycles: 3.02
  • UOPS_EXECUTED.THREAD: 16.5
  • RETIRE_SLOTS: 17.5
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.5
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 4.01
  • Reference cycles: 3.02
  • UOPS_EXECUTED.THREAD: 16.05
  • RETIRE_SLOTS: 16.05
  • UOPS_MITE: 0.15
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With loop_count=100, unroll_count=20, and padding (long NOPs)

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 4.01
  • Reference cycles: 3.01
  • UOPS_EXECUTED.THREAD: 16.05
  • RETIRE_SLOTS: 17.05
  • UOPS_MITE: 0.16
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 4.0
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 0.05
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 4.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    26:	00 00 00 20 
    2a:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    31:	00 00 00 20 
    35:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    3c:	00 00 00 20 
    40:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    47:	00 00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.37
  • Reference cycles: 6.24
  • UOPS_EXECUTED.THREAD: 32.01
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 31.74
  • UOPS_MS: 0.36
  • UOPS_PORT_0: 7.99
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.02
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.94

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    26:	00 00 00 20 
    2a:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    31:	00 00 00 20 
    35:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    3c:	00 00 00 20 
    40:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    47:	00 00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.03
  • Reference cycles: 6.08
  • UOPS_EXECUTED.THREAD: 33.01
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
    2e:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    35:	00 00 00 20 
    39:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    40:	00 00 00 20 
    44:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    4b:	00 00 00 20 
    4f:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    56:	00 00 00 20 
    5a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    61:	0f 1f 84 00 00 00 00 
    68:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 8.03
  • Reference cycles: 6.05
  • UOPS_EXECUTED.THREAD: 33.01
  • RETIRE_SLOTS: 35.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    26:	00 00 00 20 
    2a:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    31:	00 00 00 20 
    35:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    3c:	00 00 00 20 
    40:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    47:	00 00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 8.03
  • Reference cycles: 6.05
  • UOPS_EXECUTED.THREAD: 32.1
  • RETIRE_SLOTS: 32.1
  • UOPS_MITE: 0.29
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.07

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
    2e:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    35:	00 00 00 20 
    39:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    40:	00 00 00 20 
    44:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    4b:	00 00 00 20 
    4f:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    56:	00 00 00 20 
    5a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    61:	0f 1f 84 00 00 00 00 
    68:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 10.2
  • Core cycles: 8.02
  • Reference cycles: 6.0
  • UOPS_EXECUTED.THREAD: 32.1
  • RETIRE_SLOTS: 34.1
  • UOPS_MITE: 0.32
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 8.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 8.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With unroll_count=100 and no inner loop

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    26:	00 00 00 20 
    2a:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    31:	00 00 00 20 
    35:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    3c:	00 00 00 20 
    40:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    47:	00 00 00 20 
    4b:	c4 03 75 4b 94 2e 00 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+r13*1+0x100],ymm2
    52:	01 00 00 20 
    56:	c4 03 75 4b 9c 2e 20 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+r13*1+0x120],ymm2
    5d:	01 00 00 20 
    61:	c4 03 75 4b a4 2e 40 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+r13*1+0x140],ymm2
    68:	01 00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 11.35
  • Reference cycles: 8.48
  • UOPS_EXECUTED.THREAD: 44.01
  • RETIRE_SLOTS: 44.0
  • UOPS_MITE: 43.74
  • UOPS_MS: 0.36
  • UOPS_PORT_0: 10.99
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 0.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.02
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 10.94

With loop_count=1000 and unroll_count=1

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    26:	00 00 00 20 
    2a:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    31:	00 00 00 20 
    35:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    3c:	00 00 00 20 
    40:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    47:	00 00 00 20 
    4b:	c4 03 75 4b 94 2e 00 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+r13*1+0x100],ymm2
    52:	01 00 00 20 
    56:	c4 03 75 4b 9c 2e 20 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+r13*1+0x120],ymm2
    5d:	01 00 00 20 
    61:	c4 03 75 4b a4 2e 40 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+r13*1+0x140],ymm2
    68:	01 00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 13.0
  • Core cycles: 11.03
  • Reference cycles: 8.29
  • UOPS_EXECUTED.THREAD: 45.0
  • RETIRE_SLOTS: 45.0
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
    2e:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    35:	00 00 00 20 
    39:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    40:	00 00 00 20 
    44:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    4b:	00 00 00 20 
    4f:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    56:	00 00 00 20 
    5a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    61:	0f 1f 84 00 00 00 00 
    68:	00 
    69:	c4 03 75 4b 94 2e 00 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+r13*1+0x100],ymm2
    70:	01 00 00 20 
    74:	c4 03 75 4b 9c 2e 20 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+r13*1+0x120],ymm2
    7b:	01 00 00 20 
    7f:	c4 03 75 4b a4 2e 40 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+r13*1+0x140],ymm2
    86:	01 00 00 20 
    8a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    91:	0f 1f 84 00 00 00 00 
    98:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 11.02
  • Reference cycles: 8.3
  • UOPS_EXECUTED.THREAD: 45.01
  • RETIRE_SLOTS: 48.0
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 1.0
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    26:	00 00 00 20 
    2a:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    31:	00 00 00 20 
    35:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    3c:	00 00 00 20 
    40:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    47:	00 00 00 20 
    4b:	c4 03 75 4b 94 2e 00 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+r13*1+0x100],ymm2
    52:	01 00 00 20 
    56:	c4 03 75 4b 9c 2e 20 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+r13*1+0x120],ymm2
    5d:	01 00 00 20 
    61:	c4 03 75 4b a4 2e 40 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+r13*1+0x140],ymm2
    68:	01 00 00 20 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 11.2
  • Core cycles: 11.02
  • Reference cycles: 8.29
  • UOPS_EXECUTED.THREAD: 44.1
  • RETIRE_SLOTS: 44.1
  • UOPS_MITE: 0.42
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c4 83 75 4b 04 2e 20 	vblendvpd ymm0,ymm1,YMMWORD PTR [r14+r13*1],ymm2
     7:	c4 83 75 4b 5c 2e 20 	vblendvpd ymm3,ymm1,YMMWORD PTR [r14+r13*1+0x20],ymm2
     e:	20 
     f:	c4 83 75 4b 64 2e 40 	vblendvpd ymm4,ymm1,YMMWORD PTR [r14+r13*1+0x40],ymm2
    16:	20 
    17:	c4 83 75 4b 6c 2e 60 	vblendvpd ymm5,ymm1,YMMWORD PTR [r14+r13*1+0x60],ymm2
    1e:	20 
    1f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    26:	0f 1f 84 00 00 00 00 
    2d:	00 
    2e:	c4 83 75 4b b4 2e 80 	vblendvpd ymm6,ymm1,YMMWORD PTR [r14+r13*1+0x80],ymm2
    35:	00 00 00 20 
    39:	c4 83 75 4b bc 2e a0 	vblendvpd ymm7,ymm1,YMMWORD PTR [r14+r13*1+0xa0],ymm2
    40:	00 00 00 20 
    44:	c4 03 75 4b 84 2e c0 	vblendvpd ymm8,ymm1,YMMWORD PTR [r14+r13*1+0xc0],ymm2
    4b:	00 00 00 20 
    4f:	c4 03 75 4b 8c 2e e0 	vblendvpd ymm9,ymm1,YMMWORD PTR [r14+r13*1+0xe0],ymm2
    56:	00 00 00 20 
    5a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    61:	0f 1f 84 00 00 00 00 
    68:	00 
    69:	c4 03 75 4b 94 2e 00 	vblendvpd ymm10,ymm1,YMMWORD PTR [r14+r13*1+0x100],ymm2
    70:	01 00 00 20 
    74:	c4 03 75 4b 9c 2e 20 	vblendvpd ymm11,ymm1,YMMWORD PTR [r14+r13*1+0x120],ymm2
    7b:	01 00 00 20 
    7f:	c4 03 75 4b a4 2e 40 	vblendvpd ymm12,ymm1,YMMWORD PTR [r14+r13*1+0x140],ymm2
    86:	01 00 00 20 
    8a:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 cs nop WORD PTR [rax+rax*1+0x0]
    91:	0f 1f 84 00 00 00 00 
    98:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  VMOVUPD YMM1, [R14];
  VXORPS YMM2, YMM2, YMM2;
  XOR R13, R13;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  MOV [R14+128], RAX;
  MOV [R14+136], RAX;
  MOV [R14+144], RAX;
  MOV [R14+152], RAX;
  MOV [R14+160], RAX;
  MOV [R14+168], RAX;
  MOV [R14+176], RAX;
  MOV [R14+184], RAX;
  MOV [R14+192], RAX;
  MOV [R14+200], RAX;
  MOV [R14+208], RAX;
  MOV [R14+216], RAX;
  MOV [R14+224], RAX;
  MOV [R14+232], RAX;
  MOV [R14+240], RAX;
  MOV [R14+248], RAX;
  MOV [R14+256], RAX;
  MOV [R14+264], RAX;
  MOV [R14+272], RAX;
  MOV [R14+280], RAX;
  MOV [R14+288], RAX;
  MOV [R14+296], RAX;
  MOV [R14+304], RAX;
  MOV [R14+312], RAX;
  MOV [R14+320], RAX;
  MOV [R14+328], RAX;
  MOV [R14+336], RAX;
  MOV [R14+344], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 14.2
  • Core cycles: 11.03
  • Reference cycles: 8.29
  • UOPS_EXECUTED.THREAD: 44.1
  • RETIRE_SLOTS: 47.1
  • UOPS_MITE: 0.48
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 11.0
  • UOPS_PORT_1: 11.0
  • UOPS_PORT_6: 0.1
  • UOPS_PORT_49: 0.0
  • UOPS_PORT_78: 0.0
  • UOPS_PORT_5B: 11.0
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 11.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.11