MOVUPS (XMM, M128)

With unroll_count=500 and no inner loop

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.51
- Reference cycles: 0.38
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 0.99
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 1.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.18

With loop_count=1000 and unroll_count=10

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 0.51
- Reference cycles: 0.38
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 1.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 0.5
- Reference cycles: 0.38
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 1.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 1.36
- Reference cycles: 0.96
- UOPS_EXECUTED.THREAD: 3.98
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 3.73
- UOPS_MS: 0.19
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 4.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.65

With loop_count=1000 and unroll_count=2

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 1.35
- Reference cycles: 1.01
- UOPS_EXECUTED.THREAD: 4.51
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 4.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 1.35
- Reference cycles: 1.01
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.01
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 4.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 10 66 40       	movups xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 10 6e 50       	movups xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 10 76 60       	movups xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 10 7e 70       	movups xmm7,XMMWORD PTR [r14+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 2.67
- Reference cycles: 1.92
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 8.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.35

With loop_count=1000 and unroll_count=1

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 10 66 40       	movups xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 10 6e 50       	movups xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 10 76 60       	movups xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 10 7e 70       	movups xmm7,XMMWORD PTR [r14+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 2.69
- Reference cycles: 2.02
- UOPS_EXECUTED.THREAD: 9.01
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.0
- UOPS_MS: 0.03
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 8.01
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 10 66 40       	movups xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 10 6e 50       	movups xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 10 76 60       	movups xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 10 7e 70       	movups xmm7,XMMWORD PTR [r14+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 2.68
- Reference cycles: 2.02
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.02
- UOPS_MS: 0.04
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 8.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 10 66 40       	movups xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 10 6e 50       	movups xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 10 76 60       	movups xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 10 7e 70       	movups xmm7,XMMWORD PTR [r14+0x70]
  27:	45 0f 10 86 80 00 00 	movups xmm8,XMMWORD PTR [r14+0x80]
  2e:	00 
  2f:	45 0f 10 8e 90 00 00 	movups xmm9,XMMWORD PTR [r14+0x90]
  36:	00 
  37:	45 0f 10 96 a0 00 00 	movups xmm10,XMMWORD PTR [r14+0xa0]
  3e:	00 
  3f:	45 0f 10 9e b0 00 00 	movups xmm11,XMMWORD PTR [r14+0xb0]
  46:	00 
  47:	45 0f 10 a6 c0 00 00 	movups xmm12,XMMWORD PTR [r14+0xc0]
  4e:	00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 4.42
- Reference cycles: 3.04
- UOPS_EXECUTED.THREAD: 12.96
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 12.66
- UOPS_MS: 0.36
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 13.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.31

With loop_count=1000 and unroll_count=1

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 10 66 40       	movups xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 10 6e 50       	movups xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 10 76 60       	movups xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 10 7e 70       	movups xmm7,XMMWORD PTR [r14+0x70]
  27:	45 0f 10 86 80 00 00 	movups xmm8,XMMWORD PTR [r14+0x80]
  2e:	00 
  2f:	45 0f 10 8e 90 00 00 	movups xmm9,XMMWORD PTR [r14+0x90]
  36:	00 
  37:	45 0f 10 96 a0 00 00 	movups xmm10,XMMWORD PTR [r14+0xa0]
  3e:	00 
  3f:	45 0f 10 9e b0 00 00 	movups xmm11,XMMWORD PTR [r14+0xb0]
  46:	00 
  47:	45 0f 10 a6 c0 00 00 	movups xmm12,XMMWORD PTR [r14+0xc0]
  4e:	00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 4.36
- Reference cycles: 3.26
- UOPS_EXECUTED.THREAD: 14.01
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.04
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 13.01
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]
   4:	41 0f 10 4e 10       	movups xmm1,XMMWORD PTR [r14+0x10]
   9:	41 0f 10 56 20       	movups xmm2,XMMWORD PTR [r14+0x20]
   e:	41 0f 10 5e 30       	movups xmm3,XMMWORD PTR [r14+0x30]
  13:	41 0f 10 66 40       	movups xmm4,XMMWORD PTR [r14+0x40]
  18:	41 0f 10 6e 50       	movups xmm5,XMMWORD PTR [r14+0x50]
  1d:	41 0f 10 76 60       	movups xmm6,XMMWORD PTR [r14+0x60]
  22:	41 0f 10 7e 70       	movups xmm7,XMMWORD PTR [r14+0x70]
  27:	45 0f 10 86 80 00 00 	movups xmm8,XMMWORD PTR [r14+0x80]
  2e:	00 
  2f:	45 0f 10 8e 90 00 00 	movups xmm9,XMMWORD PTR [r14+0x90]
  36:	00 
  37:	45 0f 10 96 a0 00 00 	movups xmm10,XMMWORD PTR [r14+0xa0]
  3e:	00 
  3f:	45 0f 10 9e b0 00 00 	movups xmm11,XMMWORD PTR [r14+0xb0]
  46:	00 
  47:	45 0f 10 a6 c0 00 00 	movups xmm12,XMMWORD PTR [r14+0xc0]
  4e:	00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 4.36
- Reference cycles: 3.26
- UOPS_EXECUTED.THREAD: 13.1
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.1
- UOPS_MS: 0.04
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 13.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.5
- Reference cycles: 0.42
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 1.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.17

With loop_count=1000 and unroll_count=10

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 0.5
- Reference cycles: 0.38
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 1.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 0.5
- Reference cycles: 0.38
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.01
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 1.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 1.35
- Reference cycles: 0.96
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 3.71
- UOPS_MS: 0.18
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 4.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.67

With loop_count=1000 and unroll_count=2

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 1.34
- Reference cycles: 1.01
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.0
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 4.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 1.34
- Reference cycles: 1.01
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.02
- UOPS_MS: 0.02
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.05
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 4.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 10 64 2e 40    	movups xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 10 6c 2e 50    	movups xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 10 74 2e 60    	movups xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 10 7c 2e 70    	movups xmm7,XMMWORD PTR [r14+r13*1+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 2.7
- Reference cycles: 1.92
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 7.4
- UOPS_MS: 0.37
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 8.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.31

With loop_count=1000 and unroll_count=1

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 10 64 2e 40    	movups xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 10 6c 2e 50    	movups xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 10 74 2e 60    	movups xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 10 7c 2e 70    	movups xmm7,XMMWORD PTR [r14+r13*1+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 2.68
- Reference cycles: 2.11
- UOPS_EXECUTED.THREAD: 9.01
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.0
- UOPS_MS: 0.03
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 8.01
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 10 64 2e 40    	movups xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 10 6c 2e 50    	movups xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 10 74 2e 60    	movups xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 10 7c 2e 70    	movups xmm7,XMMWORD PTR [r14+r13*1+0x70]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 2.68
- Reference cycles: 2.02
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.02
- UOPS_MS: 0.04
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 8.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 10 64 2e 40    	movups xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 10 6c 2e 50    	movups xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 10 74 2e 60    	movups xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 10 7c 2e 70    	movups xmm7,XMMWORD PTR [r14+r13*1+0x70]
  2f:	47 0f 10 84 2e 80 00 	movups xmm8,XMMWORD PTR [r14+r13*1+0x80]
  36:	00 00 
  38:	47 0f 10 8c 2e 90 00 	movups xmm9,XMMWORD PTR [r14+r13*1+0x90]
  3f:	00 00 
  41:	47 0f 10 94 2e a0 00 	movups xmm10,XMMWORD PTR [r14+r13*1+0xa0]
  48:	00 00 
  4a:	47 0f 10 9c 2e b0 00 	movups xmm11,XMMWORD PTR [r14+r13*1+0xb0]
  51:	00 00 
  53:	47 0f 10 a4 2e c0 00 	movups xmm12,XMMWORD PTR [r14+r13*1+0xc0]
  5a:	00 00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 4.34
- Reference cycles: 3.36
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 13.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 13.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.53

With loop_count=1000 and unroll_count=1

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 10 64 2e 40    	movups xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 10 6c 2e 50    	movups xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 10 74 2e 60    	movups xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 10 7c 2e 70    	movups xmm7,XMMWORD PTR [r14+r13*1+0x70]
  2f:	47 0f 10 84 2e 80 00 	movups xmm8,XMMWORD PTR [r14+r13*1+0x80]
  36:	00 00 
  38:	47 0f 10 8c 2e 90 00 	movups xmm9,XMMWORD PTR [r14+r13*1+0x90]
  3f:	00 00 
  41:	47 0f 10 94 2e a0 00 	movups xmm10,XMMWORD PTR [r14+r13*1+0xa0]
  48:	00 00 
  4a:	47 0f 10 9c 2e b0 00 	movups xmm11,XMMWORD PTR [r14+r13*1+0xb0]
  51:	00 00 
  53:	47 0f 10 a4 2e c0 00 	movups xmm12,XMMWORD PTR [r14+r13*1+0xc0]
  5a:	00 00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 4.36
- Reference cycles: 3.26
- UOPS_EXECUTED.THREAD: 14.01
- RETIRE_SLOTS: 14.0
- UOPS_MITE: 0.03
- UOPS_MS: 0.04
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 13.01
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]
   5:	43 0f 10 4c 2e 10    	movups xmm1,XMMWORD PTR [r14+r13*1+0x10]
   b:	43 0f 10 54 2e 20    	movups xmm2,XMMWORD PTR [r14+r13*1+0x20]
  11:	43 0f 10 5c 2e 30    	movups xmm3,XMMWORD PTR [r14+r13*1+0x30]
  17:	43 0f 10 64 2e 40    	movups xmm4,XMMWORD PTR [r14+r13*1+0x40]
  1d:	43 0f 10 6c 2e 50    	movups xmm5,XMMWORD PTR [r14+r13*1+0x50]
  23:	43 0f 10 74 2e 60    	movups xmm6,XMMWORD PTR [r14+r13*1+0x60]
  29:	43 0f 10 7c 2e 70    	movups xmm7,XMMWORD PTR [r14+r13*1+0x70]
  2f:	47 0f 10 84 2e 80 00 	movups xmm8,XMMWORD PTR [r14+r13*1+0x80]
  36:	00 00 
  38:	47 0f 10 8c 2e 90 00 	movups xmm9,XMMWORD PTR [r14+r13*1+0x90]
  3f:	00 00 
  41:	47 0f 10 94 2e a0 00 	movups xmm10,XMMWORD PTR [r14+r13*1+0xa0]
  48:	00 00 
  4a:	47 0f 10 9c 2e b0 00 	movups xmm11,XMMWORD PTR [r14+r13*1+0xb0]
  51:	00 00 
  53:	47 0f 10 a4 2e c0 00 	movups xmm12,XMMWORD PTR [r14+r13*1+0xc0]
  5a:	00 00

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOV [R14+80], RAX;
MOV [R14+88], RAX;
MOV [R14+96], RAX;
MOV [R14+104], RAX;
MOV [R14+112], RAX;
MOV [R14+120], RAX;
MOV [R14+128], RAX;
MOV [R14+136], RAX;
MOV [R14+144], RAX;
MOV [R14+152], RAX;
MOV [R14+160], RAX;
MOV [R14+168], RAX;
MOV [R14+176], RAX;
MOV [R14+184], RAX;
MOV [R14+192], RAX;
MOV [R14+200], RAX

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 4.36
- Reference cycles: 3.26
- UOPS_EXECUTED.THREAD: 13.1
- RETIRE_SLOTS: 13.1
- UOPS_MITE: 0.1
- UOPS_MS: 0.04
- UOPS_PORT_0: 0.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_6: 0.1
- UOPS_PORT_49: 0.0
- UOPS_PORT_78: 0.0
- UOPS_PORT_5B: 0.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 13.01
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

MOVUPS (XMM, M128) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10