ADD (M8, I8) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 1.03
  • Reference cycles: 0.93
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 2.0
  • UOPS_MITE: 2.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.2
  • UOPS_PORT_1: 0.2
  • UOPS_PORT_6: 0.2
  • UOPS_PORT_49: 1.0
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 0.4
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 1.0
  • Reference cycles: 0.8
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.17
  • UOPS_PORT_1: 0.2
  • UOPS_PORT_6: 0.23
  • UOPS_PORT_49: 1.0
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 0.4
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	90                   	nop
     5:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 1.0
  • Reference cycles: 0.74
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.17
  • UOPS_PORT_1: 0.2
  • UOPS_PORT_6: 0.2
  • UOPS_PORT_49: 1.0
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 0.43
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 1.02
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 4.94
  • UOPS_MS: 0.07
  • UOPS_PORT_0: 0.18
  • UOPS_PORT_1: 0.18
  • UOPS_PORT_6: 0.22
  • UOPS_PORT_49: 1.0
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 0.41
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.99

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 1.02
  • Reference cycles: 0.77
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 5.93
  • UOPS_MS: 0.07
  • UOPS_PORT_0: 0.14
  • UOPS_PORT_1: 0.14
  • UOPS_PORT_6: 0.21
  • UOPS_PORT_49: 1.0
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 0.5
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.99

With unroll_count=500, no inner loop, and 5 NOPs

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	90                   	nop
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 2.0
  • Reference cycles: 1.5
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 7.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.2
  • UOPS_PORT_1: 0.2
  • UOPS_PORT_6: 0.2
  • UOPS_PORT_49: 1.0
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 0.4
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 1.0
  • Reference cycles: 0.75
  • UOPS_EXECUTED.THREAD: 4.1
  • RETIRE_SLOTS: 2.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.2
  • UOPS_PORT_1: 0.2
  • UOPS_PORT_6: 0.29
  • UOPS_PORT_49: 1.0
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 0.41
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 1.0
  • Reference cycles: 0.75
  • UOPS_EXECUTED.THREAD: 4.01
  • RETIRE_SLOTS: 2.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 0.2
  • UOPS_PORT_1: 0.2
  • UOPS_PORT_6: 0.22
  • UOPS_PORT_49: 1.0
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 0.41
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 3.82
  • Reference cycles: 2.96
  • UOPS_EXECUTED.THREAD: 16.01
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 7.91
  • UOPS_MS: 0.18
  • UOPS_PORT_0: 0.8
  • UOPS_PORT_1: 0.83
  • UOPS_PORT_6: 0.92
  • UOPS_PORT_49: 4.11
  • UOPS_PORT_78: 4.0
  • UOPS_PORT_5B: 1.87
  • UOPS_PORT_5B>=2: 0.12
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 3.96

With loop_count=1000 and unroll_count=2

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 2.22
  • Reference cycles: 1.66
  • UOPS_EXECUTED.THREAD: 16.52
  • RETIRE_SLOTS: 8.5
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 0.8
  • UOPS_PORT_1: 0.83
  • UOPS_PORT_6: 1.11
  • UOPS_PORT_49: 4.0
  • UOPS_PORT_78: 4.0
  • UOPS_PORT_5B: 1.77
  • UOPS_PORT_5B>=2: 0.47
  • UOPS_PORT_23A: 4.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 2.53
  • Reference cycles: 1.9
  • UOPS_EXECUTED.THREAD: 16.05
  • RETIRE_SLOTS: 8.05
  • UOPS_MITE: 0.07
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 0.95
  • UOPS_PORT_1: 0.96
  • UOPS_PORT_6: 1.02
  • UOPS_PORT_49: 4.18
  • UOPS_PORT_78: 4.0
  • UOPS_PORT_5B: 1.97
  • UOPS_PORT_5B>=2: 0.37
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
    13:	41 80 46 04 02       	add    BYTE PTR [r14+0x4],0x2
    18:	41 80 46 05 02       	add    BYTE PTR [r14+0x5],0x2
    1d:	41 80 46 06 02       	add    BYTE PTR [r14+0x6],0x2
    22:	41 80 46 07 02       	add    BYTE PTR [r14+0x7],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.0
  • Reference cycles: 5.76
  • UOPS_EXECUTED.THREAD: 32.0
  • RETIRE_SLOTS: 15.99
  • UOPS_MITE: 16.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 1.4
  • UOPS_PORT_1: 1.44
  • UOPS_PORT_6: 1.66
  • UOPS_PORT_49: 7.97
  • UOPS_PORT_78: 8.0
  • UOPS_PORT_5B: 3.38
  • UOPS_PORT_5B>=2: 0.16
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
    13:	41 80 46 04 02       	add    BYTE PTR [r14+0x4],0x2
    18:	41 80 46 05 02       	add    BYTE PTR [r14+0x5],0x2
    1d:	41 80 46 06 02       	add    BYTE PTR [r14+0x6],0x2
    22:	41 80 46 07 02       	add    BYTE PTR [r14+0x7],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 4.43
  • Reference cycles: 3.33
  • UOPS_EXECUTED.THREAD: 33.04
  • RETIRE_SLOTS: 17.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 1.61
  • UOPS_PORT_1: 1.66
  • UOPS_PORT_6: 2.23
  • UOPS_PORT_49: 8.01
  • UOPS_PORT_78: 8.01
  • UOPS_PORT_5B: 3.51
  • UOPS_PORT_5B>=2: 0.9
  • UOPS_PORT_23A: 8.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
    13:	41 80 46 04 02       	add    BYTE PTR [r14+0x4],0x2
    18:	41 80 46 05 02       	add    BYTE PTR [r14+0x5],0x2
    1d:	41 80 46 06 02       	add    BYTE PTR [r14+0x6],0x2
    22:	41 80 46 07 02       	add    BYTE PTR [r14+0x7],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 4.83
  • Reference cycles: 3.65
  • UOPS_EXECUTED.THREAD: 32.1
  • RETIRE_SLOTS: 16.1
  • UOPS_MITE: 0.15
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 2.21
  • UOPS_PORT_1: 2.23
  • UOPS_PORT_6: 2.34
  • UOPS_PORT_49: 8.28
  • UOPS_PORT_78: 8.0
  • UOPS_PORT_5B: 4.61
  • UOPS_PORT_5B>=2: 1.06
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.07

With unroll_count=100 and no inner loop

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
    13:	41 80 46 04 02       	add    BYTE PTR [r14+0x4],0x2
    18:	41 80 46 05 02       	add    BYTE PTR [r14+0x5],0x2
    1d:	41 80 46 06 02       	add    BYTE PTR [r14+0x6],0x2
    22:	41 80 46 07 02       	add    BYTE PTR [r14+0x7],0x2
    27:	41 80 46 08 02       	add    BYTE PTR [r14+0x8],0x2
    2c:	41 80 46 09 02       	add    BYTE PTR [r14+0x9],0x2
    31:	41 80 46 0a 02       	add    BYTE PTR [r14+0xa],0x2
    36:	41 80 46 0b 02       	add    BYTE PTR [r14+0xb],0x2
    3b:	41 80 46 0c 02       	add    BYTE PTR [r14+0xc],0x2
    40:	41 80 46 0d 02       	add    BYTE PTR [r14+0xd],0x2
    45:	41 80 46 0e 02       	add    BYTE PTR [r14+0xe],0x2
    4a:	41 80 46 0f 02       	add    BYTE PTR [r14+0xf],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 15.63
  • Reference cycles: 11.52
  • UOPS_EXECUTED.THREAD: 64.02
  • RETIRE_SLOTS: 32.0
  • UOPS_MITE: 31.82
  • UOPS_MS: 0.36
  • UOPS_PORT_0: 2.93
  • UOPS_PORT_1: 3.1
  • UOPS_PORT_6: 3.46
  • UOPS_PORT_49: 16.06
  • UOPS_PORT_78: 16.0
  • UOPS_PORT_5B: 6.95
  • UOPS_PORT_5B>=2: 0.37
  • UOPS_PORT_23A: 16.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 15.91

With loop_count=1000 and unroll_count=1

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
    13:	41 80 46 04 02       	add    BYTE PTR [r14+0x4],0x2
    18:	41 80 46 05 02       	add    BYTE PTR [r14+0x5],0x2
    1d:	41 80 46 06 02       	add    BYTE PTR [r14+0x6],0x2
    22:	41 80 46 07 02       	add    BYTE PTR [r14+0x7],0x2
    27:	41 80 46 08 02       	add    BYTE PTR [r14+0x8],0x2
    2c:	41 80 46 09 02       	add    BYTE PTR [r14+0x9],0x2
    31:	41 80 46 0a 02       	add    BYTE PTR [r14+0xa],0x2
    36:	41 80 46 0b 02       	add    BYTE PTR [r14+0xb],0x2
    3b:	41 80 46 0c 02       	add    BYTE PTR [r14+0xc],0x2
    40:	41 80 46 0d 02       	add    BYTE PTR [r14+0xd],0x2
    45:	41 80 46 0e 02       	add    BYTE PTR [r14+0xe],0x2
    4a:	41 80 46 0f 02       	add    BYTE PTR [r14+0xf],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 8.27
  • Reference cycles: 6.24
  • UOPS_EXECUTED.THREAD: 65.04
  • RETIRE_SLOTS: 33.0
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 3.46
  • UOPS_PORT_1: 3.55
  • UOPS_PORT_6: 4.19
  • UOPS_PORT_49: 16.04
  • UOPS_PORT_78: 16.01
  • UOPS_PORT_5B: 7.32
  • UOPS_PORT_5B>=2: 1.83
  • UOPS_PORT_23A: 16.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.03

With loop_count=100 and unroll_count=10

• Code:

     0:	41 80 06 02          	add    BYTE PTR [r14],0x2
     4:	41 80 46 01 02       	add    BYTE PTR [r14+0x1],0x2
     9:	41 80 46 02 02       	add    BYTE PTR [r14+0x2],0x2
     e:	41 80 46 03 02       	add    BYTE PTR [r14+0x3],0x2
    13:	41 80 46 04 02       	add    BYTE PTR [r14+0x4],0x2
    18:	41 80 46 05 02       	add    BYTE PTR [r14+0x5],0x2
    1d:	41 80 46 06 02       	add    BYTE PTR [r14+0x6],0x2
    22:	41 80 46 07 02       	add    BYTE PTR [r14+0x7],0x2
    27:	41 80 46 08 02       	add    BYTE PTR [r14+0x8],0x2
    2c:	41 80 46 09 02       	add    BYTE PTR [r14+0x9],0x2
    31:	41 80 46 0a 02       	add    BYTE PTR [r14+0xa],0x2
    36:	41 80 46 0b 02       	add    BYTE PTR [r14+0xb],0x2
    3b:	41 80 46 0c 02       	add    BYTE PTR [r14+0xc],0x2
    40:	41 80 46 0d 02       	add    BYTE PTR [r14+0xd],0x2
    45:	41 80 46 0e 02       	add    BYTE PTR [r14+0xe],0x2
    4a:	41 80 46 0f 02       	add    BYTE PTR [r14+0xf],0x2
  

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 8.42
  • Reference cycles: 6.34
  • UOPS_EXECUTED.THREAD: 64.1
  • RETIRE_SLOTS: 32.1
  • UOPS_MITE: 0.32
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 4.51
  • UOPS_PORT_1: 4.52
  • UOPS_PORT_6: 4.67
  • UOPS_PORT_49: 16.02
  • UOPS_PORT_78: 16.0
  • UOPS_PORT_5B: 9.21
  • UOPS_PORT_5B>=2: 2.37
  • UOPS_PORT_23A: 16.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.16

With unroll_count=500 and no inner loop

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 7.39
  • Reference cycles: 5.76
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 1.97
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.85
  • UOPS_PORT_1: 2.62
  • UOPS_PORT_6: 2.9
  • UOPS_PORT_49: 5.59
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 5.91
  • UOPS_PORT_5B>=2: 1.2
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	90                   	nop
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 7.44
  • Reference cycles: 5.57
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 2.93
  • UOPS_MS: 0.07
  • UOPS_PORT_0: 2.55
  • UOPS_PORT_1: 2.83
  • UOPS_PORT_6: 2.81
  • UOPS_PORT_49: 4.1
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 5.63
  • UOPS_PORT_5B>=2: 0.96
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.98

With unroll_count=500, no inner loop, and 2 NOPs

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	90                   	nop
     6:	90                   	nop
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 7.44
  • Reference cycles: 5.57
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 3.92
  • UOPS_MS: 0.07
  • UOPS_PORT_0: 2.55
  • UOPS_PORT_1: 2.83
  • UOPS_PORT_6: 2.81
  • UOPS_PORT_49: 4.1
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 5.63
  • UOPS_PORT_5B>=2: 0.96
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.98

With unroll_count=500, no inner loop, and 3 NOPs

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 7.36
  • Reference cycles: 5.54
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 6.0
  • UOPS_MITE: 4.94
  • UOPS_MS: 0.07
  • UOPS_PORT_0: 2.65
  • UOPS_PORT_1: 2.78
  • UOPS_PORT_6: 2.89
  • UOPS_PORT_49: 4.2
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 4.4
  • UOPS_PORT_5B>=2: 0.59
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.99

With unroll_count=500, no inner loop, and 4 NOPs

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 7.39
  • Reference cycles: 5.63
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 7.0
  • UOPS_MITE: 5.9
  • UOPS_MS: 0.07
  • UOPS_PORT_0: 2.47
  • UOPS_PORT_1: 2.52
  • UOPS_PORT_6: 2.45
  • UOPS_PORT_49: 4.1
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 5.26
  • UOPS_PORT_5B>=2: 0.95
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 5 NOPs

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	90                   	nop
     6:	90                   	nop
     7:	90                   	nop
     8:	90                   	nop
     9:	90                   	nop
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 7.33
  • Reference cycles: 5.41
  • UOPS_EXECUTED.THREAD: 4.0
  • RETIRE_SLOTS: 8.0
  • UOPS_MITE: 7.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.79
  • UOPS_PORT_1: 2.79
  • UOPS_PORT_6: 2.78
  • UOPS_PORT_49: 4.86
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 5.64
  • UOPS_PORT_5B>=2: 1.16
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 7.39
  • Reference cycles: 5.56
  • UOPS_EXECUTED.THREAD: 4.1
  • RETIRE_SLOTS: 3.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.78
  • UOPS_PORT_1: 2.67
  • UOPS_PORT_6: 3.05
  • UOPS_PORT_49: 5.54
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 5.91
  • UOPS_PORT_5B>=2: 1.25
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 7.39
  • Reference cycles: 5.56
  • UOPS_EXECUTED.THREAD: 4.01
  • RETIRE_SLOTS: 3.01
  • UOPS_MITE: 0.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.82
  • UOPS_PORT_1: 2.64
  • UOPS_PORT_6: 2.98
  • UOPS_PORT_49: 5.51
  • UOPS_PORT_78: 1.0
  • UOPS_PORT_5B: 5.9
  • UOPS_PORT_5B>=2: 1.23
  • UOPS_PORT_23A: 1.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With unroll_count=200 and no inner loop

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 8.38
  • Reference cycles: 6.24
  • UOPS_EXECUTED.THREAD: 16.0
  • RETIRE_SLOTS: 12.0
  • UOPS_MITE: 7.72
  • UOPS_MS: 0.18
  • UOPS_PORT_0: 3.69
  • UOPS_PORT_1: 3.78
  • UOPS_PORT_6: 4.03
  • UOPS_PORT_49: 5.29
  • UOPS_PORT_78: 4.0
  • UOPS_PORT_5B: 8.03
  • UOPS_PORT_5B>=2: 1.85
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 3.96

With loop_count=1000 and unroll_count=2

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 8.16
  • Reference cycles: 6.13
  • UOPS_EXECUTED.THREAD: 16.5
  • RETIRE_SLOTS: 12.5
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 3.18
  • UOPS_PORT_1: 3.25
  • UOPS_PORT_6: 3.73
  • UOPS_PORT_49: 5.66
  • UOPS_PORT_78: 4.0
  • UOPS_PORT_5B: 7.48
  • UOPS_PORT_5B>=2: 1.51
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 8.33
  • Reference cycles: 6.29
  • UOPS_EXECUTED.THREAD: 16.05
  • RETIRE_SLOTS: 12.05
  • UOPS_MITE: 0.07
  • UOPS_MS: 0.02
  • UOPS_PORT_0: 3.71
  • UOPS_PORT_1: 3.83
  • UOPS_PORT_6: 3.99
  • UOPS_PORT_49: 5.02
  • UOPS_PORT_78: 4.0
  • UOPS_PORT_5B: 7.74
  • UOPS_PORT_5B>=2: 1.64
  • UOPS_PORT_23A: 4.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.04

With unroll_count=100 and no inner loop

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
    17:	43 80 44 2e 04 02    	add    BYTE PTR [r14+r13*1+0x4],0x2
    1d:	43 80 44 2e 05 02    	add    BYTE PTR [r14+r13*1+0x5],0x2
    23:	43 80 44 2e 06 02    	add    BYTE PTR [r14+r13*1+0x6],0x2
    29:	43 80 44 2e 07 02    	add    BYTE PTR [r14+r13*1+0x7],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 8.05
  • Reference cycles: 5.92
  • UOPS_EXECUTED.THREAD: 32.0
  • RETIRE_SLOTS: 24.0
  • UOPS_MITE: 15.82
  • UOPS_MS: 0.36
  • UOPS_PORT_0: 3.76
  • UOPS_PORT_1: 3.83
  • UOPS_PORT_6: 3.93
  • UOPS_PORT_49: 9.29
  • UOPS_PORT_78: 8.0
  • UOPS_PORT_5B: 7.9
  • UOPS_PORT_5B>=2: 1.68
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 7.91

With loop_count=1000 and unroll_count=1

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
    17:	43 80 44 2e 04 02    	add    BYTE PTR [r14+r13*1+0x4],0x2
    1d:	43 80 44 2e 05 02    	add    BYTE PTR [r14+r13*1+0x5],0x2
    23:	43 80 44 2e 06 02    	add    BYTE PTR [r14+r13*1+0x6],0x2
    29:	43 80 44 2e 07 02    	add    BYTE PTR [r14+r13*1+0x7],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 8.01
  • Reference cycles: 6.02
  • UOPS_EXECUTED.THREAD: 33.01
  • RETIRE_SLOTS: 25.0
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 3.95
  • UOPS_PORT_1: 4.04
  • UOPS_PORT_6: 4.77
  • UOPS_PORT_49: 9.27
  • UOPS_PORT_78: 8.01
  • UOPS_PORT_5B: 8.19
  • UOPS_PORT_5B>=2: 1.9
  • UOPS_PORT_23A: 8.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
    17:	43 80 44 2e 04 02    	add    BYTE PTR [r14+r13*1+0x4],0x2
    1d:	43 80 44 2e 05 02    	add    BYTE PTR [r14+r13*1+0x5],0x2
    23:	43 80 44 2e 06 02    	add    BYTE PTR [r14+r13*1+0x6],0x2
    29:	43 80 44 2e 07 02    	add    BYTE PTR [r14+r13*1+0x7],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 7.98
  • Reference cycles: 5.98
  • UOPS_EXECUTED.THREAD: 32.1
  • RETIRE_SLOTS: 24.1
  • UOPS_MITE: 0.16
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 3.94
  • UOPS_PORT_1: 4.01
  • UOPS_PORT_6: 4.23
  • UOPS_PORT_49: 9.03
  • UOPS_PORT_78: 8.0
  • UOPS_PORT_5B: 8.3
  • UOPS_PORT_5B>=2: 1.96
  • UOPS_PORT_23A: 8.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.08

With unroll_count=100 and no inner loop

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
    17:	43 80 44 2e 04 02    	add    BYTE PTR [r14+r13*1+0x4],0x2
    1d:	43 80 44 2e 05 02    	add    BYTE PTR [r14+r13*1+0x5],0x2
    23:	43 80 44 2e 06 02    	add    BYTE PTR [r14+r13*1+0x6],0x2
    29:	43 80 44 2e 07 02    	add    BYTE PTR [r14+r13*1+0x7],0x2
    2f:	43 80 44 2e 08 02    	add    BYTE PTR [r14+r13*1+0x8],0x2
    35:	43 80 44 2e 09 02    	add    BYTE PTR [r14+r13*1+0x9],0x2
    3b:	43 80 44 2e 0a 02    	add    BYTE PTR [r14+r13*1+0xa],0x2
    41:	43 80 44 2e 0b 02    	add    BYTE PTR [r14+r13*1+0xb],0x2
    47:	43 80 44 2e 0c 02    	add    BYTE PTR [r14+r13*1+0xc],0x2
    4d:	43 80 44 2e 0d 02    	add    BYTE PTR [r14+r13*1+0xd],0x2
    53:	43 80 44 2e 0e 02    	add    BYTE PTR [r14+r13*1+0xe],0x2
    59:	43 80 44 2e 0f 02    	add    BYTE PTR [r14+r13*1+0xf],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.0
  • Core cycles: 16.0
  • Reference cycles: 12.16
  • UOPS_EXECUTED.THREAD: 64.0
  • RETIRE_SLOTS: 48.0
  • UOPS_MITE: 32.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 3.21
  • UOPS_PORT_1: 3.21
  • UOPS_PORT_6: 3.19
  • UOPS_PORT_49: 16.0
  • UOPS_PORT_78: 16.0
  • UOPS_PORT_5B: 6.39
  • UOPS_PORT_5B>=2: 0.0
  • UOPS_PORT_23A: 16.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 16.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
    17:	43 80 44 2e 04 02    	add    BYTE PTR [r14+r13*1+0x4],0x2
    1d:	43 80 44 2e 05 02    	add    BYTE PTR [r14+r13*1+0x5],0x2
    23:	43 80 44 2e 06 02    	add    BYTE PTR [r14+r13*1+0x6],0x2
    29:	43 80 44 2e 07 02    	add    BYTE PTR [r14+r13*1+0x7],0x2
    2f:	43 80 44 2e 08 02    	add    BYTE PTR [r14+r13*1+0x8],0x2
    35:	43 80 44 2e 09 02    	add    BYTE PTR [r14+r13*1+0x9],0x2
    3b:	43 80 44 2e 0a 02    	add    BYTE PTR [r14+r13*1+0xa],0x2
    41:	43 80 44 2e 0b 02    	add    BYTE PTR [r14+r13*1+0xb],0x2
    47:	43 80 44 2e 0c 02    	add    BYTE PTR [r14+r13*1+0xc],0x2
    4d:	43 80 44 2e 0d 02    	add    BYTE PTR [r14+r13*1+0xd],0x2
    53:	43 80 44 2e 0e 02    	add    BYTE PTR [r14+r13*1+0xe],0x2
    59:	43 80 44 2e 0f 02    	add    BYTE PTR [r14+r13*1+0xf],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 18.0
  • Core cycles: 8.71
  • Reference cycles: 6.54
  • UOPS_EXECUTED.THREAD: 65.02
  • RETIRE_SLOTS: 49.0
  • UOPS_MITE: 0.16
  • UOPS_MS: 0.04
  • UOPS_PORT_0: 4.75
  • UOPS_PORT_1: 4.85
  • UOPS_PORT_6: 5.56
  • UOPS_PORT_49: 16.01
  • UOPS_PORT_78: 16.01
  • UOPS_PORT_5B: 10.05
  • UOPS_PORT_5B>=2: 2.6
  • UOPS_PORT_23A: 16.01
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.06

With loop_count=100 and unroll_count=10

• Code:

     0:	43 80 04 2e 02       	add    BYTE PTR [r14+r13*1],0x2
     5:	43 80 44 2e 01 02    	add    BYTE PTR [r14+r13*1+0x1],0x2
     b:	43 80 44 2e 02 02    	add    BYTE PTR [r14+r13*1+0x2],0x2
    11:	43 80 44 2e 03 02    	add    BYTE PTR [r14+r13*1+0x3],0x2
    17:	43 80 44 2e 04 02    	add    BYTE PTR [r14+r13*1+0x4],0x2
    1d:	43 80 44 2e 05 02    	add    BYTE PTR [r14+r13*1+0x5],0x2
    23:	43 80 44 2e 06 02    	add    BYTE PTR [r14+r13*1+0x6],0x2
    29:	43 80 44 2e 07 02    	add    BYTE PTR [r14+r13*1+0x7],0x2
    2f:	43 80 44 2e 08 02    	add    BYTE PTR [r14+r13*1+0x8],0x2
    35:	43 80 44 2e 09 02    	add    BYTE PTR [r14+r13*1+0x9],0x2
    3b:	43 80 44 2e 0a 02    	add    BYTE PTR [r14+r13*1+0xa],0x2
    41:	43 80 44 2e 0b 02    	add    BYTE PTR [r14+r13*1+0xb],0x2
    47:	43 80 44 2e 0c 02    	add    BYTE PTR [r14+r13*1+0xc],0x2
    4d:	43 80 44 2e 0d 02    	add    BYTE PTR [r14+r13*1+0xd],0x2
    53:	43 80 44 2e 0e 02    	add    BYTE PTR [r14+r13*1+0xe],0x2
    59:	43 80 44 2e 0f 02    	add    BYTE PTR [r14+r13*1+0xf],0x2
  

• Init:

  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 16.2
  • Core cycles: 8.46
  • Reference cycles: 6.32
  • UOPS_EXECUTED.THREAD: 64.1
  • RETIRE_SLOTS: 48.1
  • UOPS_MITE: 0.3
  • UOPS_MS: 0.03
  • UOPS_PORT_0: 3.92
  • UOPS_PORT_1: 4.0
  • UOPS_PORT_6: 4.29
  • UOPS_PORT_49: 16.01
  • UOPS_PORT_78: 16.0
  • UOPS_PORT_5B: 9.17
  • UOPS_PORT_5B>=2: 2.2
  • UOPS_PORT_23A: 16.0
  • DIV_CYCLES: 0.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.15