POPCNT (R32, M32)

With unroll_count=500 and no inner loop

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 0.99
- UOPS_RETIRED.ALL: 1.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 1.03
- UOPS_RETIRED.ALL: 1.2
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 1.03
- UOPS_RETIRED.ALL: 1.02
- UOPS_MS: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]
   5:	f3 45 0f b8 4e 04    	popcnt r9d,DWORD PTR [r14+0x4]
   b:	f3 45 0f b8 56 08    	popcnt r10d,DWORD PTR [r14+0x8]
  11:	f3 45 0f b8 5e 0c    	popcnt r11d,DWORD PTR [r14+0xc]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 4.16
- UOPS_RETIRED.ALL: 4.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]
   5:	f3 45 0f b8 4e 04    	popcnt r9d,DWORD PTR [r14+0x4]
   b:	f3 45 0f b8 56 08    	popcnt r10d,DWORD PTR [r14+0x8]
  11:	f3 45 0f b8 5e 0c    	popcnt r11d,DWORD PTR [r14+0xc]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 4.1
- UOPS_RETIRED.ALL: 5.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]
   5:	f3 45 0f b8 4e 04    	popcnt r9d,DWORD PTR [r14+0x4]
   b:	f3 45 0f b8 56 08    	popcnt r10d,DWORD PTR [r14+0x8]
  11:	f3 45 0f b8 5e 0c    	popcnt r11d,DWORD PTR [r14+0xc]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 4.1
- UOPS_RETIRED.ALL: 4.1
- UOPS_MS: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]
   5:	f3 45 0f b8 4e 04    	popcnt r9d,DWORD PTR [r14+0x4]
   b:	f3 45 0f b8 56 08    	popcnt r10d,DWORD PTR [r14+0x8]
  11:	f3 45 0f b8 5e 0c    	popcnt r11d,DWORD PTR [r14+0xc]
  17:	f3 45 0f b8 66 10    	popcnt r12d,DWORD PTR [r14+0x10]
  1d:	f3 41 0f b8 5e 14    	popcnt ebx,DWORD PTR [r14+0x14]
  23:	f3 41 0f b8 4e 18    	popcnt ecx,DWORD PTR [r14+0x18]
  29:	f3 41 0f b8 56 1c    	popcnt edx,DWORD PTR [r14+0x1c]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 8.32
- UOPS_RETIRED.ALL: 8.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]
   5:	f3 45 0f b8 4e 04    	popcnt r9d,DWORD PTR [r14+0x4]
   b:	f3 45 0f b8 56 08    	popcnt r10d,DWORD PTR [r14+0x8]
  11:	f3 45 0f b8 5e 0c    	popcnt r11d,DWORD PTR [r14+0xc]
  17:	f3 45 0f b8 66 10    	popcnt r12d,DWORD PTR [r14+0x10]
  1d:	f3 41 0f b8 5e 14    	popcnt ebx,DWORD PTR [r14+0x14]
  23:	f3 41 0f b8 4e 18    	popcnt ecx,DWORD PTR [r14+0x18]
  29:	f3 41 0f b8 56 1c    	popcnt edx,DWORD PTR [r14+0x1c]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.02
- Reference cycles: 8.19
- UOPS_RETIRED.ALL: 10.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 45 0f b8 06       	popcnt r8d,DWORD PTR [r14]
   5:	f3 45 0f b8 4e 04    	popcnt r9d,DWORD PTR [r14+0x4]
   b:	f3 45 0f b8 56 08    	popcnt r10d,DWORD PTR [r14+0x8]
  11:	f3 45 0f b8 5e 0c    	popcnt r11d,DWORD PTR [r14+0xc]
  17:	f3 45 0f b8 66 10    	popcnt r12d,DWORD PTR [r14+0x10]
  1d:	f3 41 0f b8 5e 14    	popcnt ebx,DWORD PTR [r14+0x14]
  23:	f3 41 0f b8 4e 18    	popcnt ecx,DWORD PTR [r14+0x18]
  29:	f3 41 0f b8 56 1c    	popcnt edx,DWORD PTR [r14+0x1c]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.03
- Reference cycles: 8.19
- UOPS_RETIRED.ALL: 8.2
- UOPS_MS: 0.0

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 0.99
- UOPS_RETIRED.ALL: 1.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 1.02
- UOPS_RETIRED.ALL: 1.2
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 1.03
- UOPS_RETIRED.ALL: 1.02
- UOPS_MS: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]
   6:	f3 47 0f b8 4c 2e 04 	popcnt r9d,DWORD PTR [r14+r13*1+0x4]
   d:	f3 47 0f b8 54 2e 08 	popcnt r10d,DWORD PTR [r14+r13*1+0x8]
  14:	f3 47 0f b8 5c 2e 0c 	popcnt r11d,DWORD PTR [r14+r13*1+0xc]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 4.24
- UOPS_RETIRED.ALL: 4.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]
   6:	f3 47 0f b8 4c 2e 04 	popcnt r9d,DWORD PTR [r14+r13*1+0x4]
   d:	f3 47 0f b8 54 2e 08 	popcnt r10d,DWORD PTR [r14+r13*1+0x8]
  14:	f3 47 0f b8 5c 2e 0c 	popcnt r11d,DWORD PTR [r14+r13*1+0xc]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.01
- Reference cycles: 4.12
- UOPS_RETIRED.ALL: 5.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]
   6:	f3 47 0f b8 4c 2e 04 	popcnt r9d,DWORD PTR [r14+r13*1+0x4]
   d:	f3 47 0f b8 54 2e 08 	popcnt r10d,DWORD PTR [r14+r13*1+0x8]
  14:	f3 47 0f b8 5c 2e 0c 	popcnt r11d,DWORD PTR [r14+r13*1+0xc]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.01
- Reference cycles: 4.09
- UOPS_RETIRED.ALL: 4.1
- UOPS_MS: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]
   6:	f3 47 0f b8 4c 2e 04 	popcnt r9d,DWORD PTR [r14+r13*1+0x4]
   d:	f3 47 0f b8 54 2e 08 	popcnt r10d,DWORD PTR [r14+r13*1+0x8]
  14:	f3 47 0f b8 5c 2e 0c 	popcnt r11d,DWORD PTR [r14+r13*1+0xc]
  1b:	f3 47 0f b8 64 2e 10 	popcnt r12d,DWORD PTR [r14+r13*1+0x10]
  22:	f3 43 0f b8 5c 2e 14 	popcnt ebx,DWORD PTR [r14+r13*1+0x14]
  29:	f3 43 0f b8 4c 2e 18 	popcnt ecx,DWORD PTR [r14+r13*1+0x18]
  30:	f3 43 0f b8 54 2e 1c 	popcnt edx,DWORD PTR [r14+r13*1+0x1c]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 8.48
- UOPS_RETIRED.ALL: 8.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]
   6:	f3 47 0f b8 4c 2e 04 	popcnt r9d,DWORD PTR [r14+r13*1+0x4]
   d:	f3 47 0f b8 54 2e 08 	popcnt r10d,DWORD PTR [r14+r13*1+0x8]
  14:	f3 47 0f b8 5c 2e 0c 	popcnt r11d,DWORD PTR [r14+r13*1+0xc]
  1b:	f3 47 0f b8 64 2e 10 	popcnt r12d,DWORD PTR [r14+r13*1+0x10]
  22:	f3 43 0f b8 5c 2e 14 	popcnt ebx,DWORD PTR [r14+r13*1+0x14]
  29:	f3 43 0f b8 4c 2e 18 	popcnt ecx,DWORD PTR [r14+r13*1+0x18]
  30:	f3 43 0f b8 54 2e 1c 	popcnt edx,DWORD PTR [r14+r13*1+0x1c]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.02
- Reference cycles: 8.21
- UOPS_RETIRED.ALL: 10.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	f3 47 0f b8 04 2e    	popcnt r8d,DWORD PTR [r14+r13*1]
   6:	f3 47 0f b8 4c 2e 04 	popcnt r9d,DWORD PTR [r14+r13*1+0x4]
   d:	f3 47 0f b8 54 2e 08 	popcnt r10d,DWORD PTR [r14+r13*1+0x8]
  14:	f3 47 0f b8 5c 2e 0c 	popcnt r11d,DWORD PTR [r14+r13*1+0xc]
  1b:	f3 47 0f b8 64 2e 10 	popcnt r12d,DWORD PTR [r14+r13*1+0x10]
  22:	f3 43 0f b8 5c 2e 14 	popcnt ebx,DWORD PTR [r14+r13*1+0x14]
  29:	f3 43 0f b8 4c 2e 18 	popcnt ecx,DWORD PTR [r14+r13*1+0x18]
  30:	f3 43 0f b8 54 2e 1c 	popcnt edx,DWORD PTR [r14+r13*1+0x1c]

Init:
```
VZEROALL;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.03
- Reference cycles: 8.21
- UOPS_RETIRED.ALL: 8.2
- UOPS_MS: 0.0

POPCNT (R32, M32) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10