SQRTSS (XMM, M32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 45 8d 06          	lea    r8w,[r14]
   4:	66 45 8d 0e          	lea    r9w,[r14]
   8:	66 45 8d 16          	lea    r10w,[r14]
   c:	66 45 8d 1e          	lea    r11w,[r14]
  10:	66 45 8d 26          	lea    r12w,[r14]
  14:	66 41 8d 1e          	lea    bx,[r14]
  18:	66 41 8d 0e          	lea    cx,[r14]
  1c:	66 41 8d 16          	lea    dx,[r14]
  20:	66 45 8d 06          	lea    r8w,[r14]
  24:	66 45 8d 0e          	lea    r9w,[r14]
  28:	66 45 8d 16          	lea    r10w,[r14]
  2c:	66 45 8d 1e          	lea    r11w,[r14]
  30:	f3 41 0f 51 16       	sqrtss xmm2,DWORD PTR [r14]

Init:

MOV RAX, 0x3f8000003f800000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 14.04
- Reference cycles: 13.99
- UOPS_PORT_0: 13.0

⇨ One μop that can only use port '0'

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  37:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  3c:	f3 41 0f 51 16       	sqrtss xmm2,DWORD PTR [r14]

Init:

MOV RAX, 0x3f8000003f800000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.08
- Reference cycles: 13.1
- UOPS_PORT_2: 13.0

⇨ One μop that can only use port '2'

With an indexed addressing mode

With blocking instructions for port '0':

Code:

   0:	66 45 8d 06          	lea    r8w,[r14]
   4:	66 45 8d 0e          	lea    r9w,[r14]
   8:	66 45 8d 16          	lea    r10w,[r14]
   c:	66 45 8d 1e          	lea    r11w,[r14]
  10:	66 45 8d 26          	lea    r12w,[r14]
  14:	66 41 8d 1e          	lea    bx,[r14]
  18:	66 41 8d 0e          	lea    cx,[r14]
  1c:	66 41 8d 16          	lea    dx,[r14]
  20:	66 45 8d 06          	lea    r8w,[r14]
  24:	66 45 8d 0e          	lea    r9w,[r14]
  28:	66 45 8d 16          	lea    r10w,[r14]
  2c:	66 45 8d 1e          	lea    r11w,[r14]
  30:	f3 41 0f 51 16       	sqrtss xmm2,DWORD PTR [r14]

Init:

MOV RAX, 0x3f8000003f800000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 14.04
- Reference cycles: 14.04
- UOPS_PORT_0: 13.0

⇨ One μop that can only use port '0'

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  37:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  3c:	f3 41 0f 51 16       	sqrtss xmm2,DWORD PTR [r14]

Init:

MOV RAX, 0x3f8000003f800000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.08
- Reference cycles: 13.1
- UOPS_PORT_2: 13.0

⇨ One μop that can only use port '2'