MOVUPS (M128, XMM) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 45 8d 06          	lea    r8w,[r14]
   4:	66 45 8d 0e          	lea    r9w,[r14]
   8:	66 45 8d 16          	lea    r10w,[r14]
   c:	66 45 8d 1e          	lea    r11w,[r14]
  10:	66 45 8d 26          	lea    r12w,[r14]
  14:	66 41 8d 1e          	lea    bx,[r14]
  18:	66 41 8d 0e          	lea    cx,[r14]
  1c:	66 41 8d 16          	lea    dx,[r14]
  20:	66 45 8d 06          	lea    r8w,[r14]
  24:	66 45 8d 0e          	lea    r9w,[r14]
  28:	41 0f 11 06          	movups XMMWORD PTR [r14],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 12.06
- Reference cycles: 12.06
- UOPS_PORT_0: 12.0

⇨ 2 μops that can only use port '0'

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	41 0f 11 06          	movups XMMWORD PTR [r14],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.03
- Reference cycles: 10.98
- UOPS_PORT_2: 11.0

⇨ One μop that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	41 0f 11 06          	movups XMMWORD PTR [r14],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 13.52
- Reference cycles: 13.53
- UOPS_PORT_3: 12.0

⇨ 2 μops that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	41 0f 11 06          	movups XMMWORD PTR [r14],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 13.52
- Reference cycles: 13.53
- UOPS_PORT_4: 12.0

⇨ 2 μops that can only use port '4'

With blocking instructions for port '5':

Code:

   0:	66 0f 3a 0d ca 02    	blendpd xmm1,xmm2,0x2
   6:	66 0f 3a 0d da 02    	blendpd xmm3,xmm2,0x2
   c:	66 0f 3a 0d e2 02    	blendpd xmm4,xmm2,0x2
  12:	66 0f 3a 0d ea 02    	blendpd xmm5,xmm2,0x2
  18:	66 0f 3a 0d f2 02    	blendpd xmm6,xmm2,0x2
  1e:	66 0f 3a 0d fa 02    	blendpd xmm7,xmm2,0x2
  24:	66 44 0f 3a 0d c2 02 	blendpd xmm8,xmm2,0x2
  2b:	66 44 0f 3a 0d ca 02 	blendpd xmm9,xmm2,0x2
  32:	66 44 0f 3a 0d d2 02 	blendpd xmm10,xmm2,0x2
  39:	66 44 0f 3a 0d da 02 	blendpd xmm11,xmm2,0x2
  40:	41 0f 11 06          	movups XMMWORD PTR [r14],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 12.05
- Reference cycles: 12.05
- UOPS_PORT_5: 10.75

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	41 0f 6e d0          	movd   mm2,r8d
  2c:	41 0f 6e d8          	movd   mm3,r8d
  30:	41 0f 6e e0          	movd   mm4,r8d
  34:	41 0f 6e e8          	movd   mm5,r8d
  38:	41 0f 6e f0          	movd   mm6,r8d
  3c:	41 0f 6e f8          	movd   mm7,r8d
  40:	41 0f 6e c0          	movd   mm0,r8d
  44:	41 0f 6e c8          	movd   mm1,r8d
  48:	41 0f 11 06          	movups XMMWORD PTR [r14],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 19.0
- Core cycles: 10.58
- Reference cycles: 10.58
- UOPS_PORT_0: 10.56
- UOPS_PORT_5: 10.44

⇨ One μop that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 ca          	andnpd xmm1,xmm2
   4:	66 0f 55 da          	andnpd xmm3,xmm2
   8:	66 0f 55 e2          	andnpd xmm4,xmm2
   c:	66 0f 55 ea          	andnpd xmm5,xmm2
  10:	66 0f 55 f2          	andnpd xmm6,xmm2
  14:	66 0f 55 fa          	andnpd xmm7,xmm2
  18:	66 44 0f 55 c2       	andnpd xmm8,xmm2
  1d:	66 44 0f 55 ca       	andnpd xmm9,xmm2
  22:	66 44 0f 55 d2       	andnpd xmm10,xmm2
  27:	66 44 0f 55 da       	andnpd xmm11,xmm2
  2c:	66 44 0f 55 e2       	andnpd xmm12,xmm2
  31:	66 0f 55 ca          	andnpd xmm1,xmm2
  35:	66 0f 55 da          	andnpd xmm3,xmm2
  39:	66 0f 55 e2          	andnpd xmm4,xmm2
  3d:	66 0f 55 ea          	andnpd xmm5,xmm2
  41:	66 0f 55 f2          	andnpd xmm6,xmm2
  45:	66 0f 55 fa          	andnpd xmm7,xmm2
  49:	66 44 0f 55 c2       	andnpd xmm8,xmm2
  4e:	66 44 0f 55 ca       	andnpd xmm9,xmm2
  53:	66 44 0f 55 d2       	andnpd xmm10,xmm2
  58:	66 44 0f 55 da       	andnpd xmm11,xmm2
  5d:	66 44 0f 55 e2       	andnpd xmm12,xmm2
  62:	66 0f 55 ca          	andnpd xmm1,xmm2
  66:	66 0f 55 da          	andnpd xmm3,xmm2
  6a:	66 0f 55 e2          	andnpd xmm4,xmm2
  6e:	66 0f 55 ea          	andnpd xmm5,xmm2
  72:	66 0f 55 f2          	andnpd xmm6,xmm2
  76:	41 0f 11 06          	movups XMMWORD PTR [r14],xmm0

Init:

PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 28.0
- Core cycles: 29.11
- Reference cycles: 29.15
- UOPS_PORT_0: 10.89
- UOPS_PORT_1: 10.0
- UOPS_PORT_5: 10.11

⇨ One μop that can only use ports {'0', '1', '5'}

With an indexed addressing mode

With blocking instructions for port '0':

Code:

   0:	66 45 8d 06          	lea    r8w,[r14]
   4:	66 45 8d 0e          	lea    r9w,[r14]
   8:	66 45 8d 16          	lea    r10w,[r14]
   c:	66 45 8d 1e          	lea    r11w,[r14]
  10:	66 45 8d 26          	lea    r12w,[r14]
  14:	66 41 8d 1e          	lea    bx,[r14]
  18:	66 41 8d 0e          	lea    cx,[r14]
  1c:	66 41 8d 16          	lea    dx,[r14]
  20:	66 45 8d 06          	lea    r8w,[r14]
  24:	66 45 8d 0e          	lea    r9w,[r14]
  28:	43 0f 11 04 2e       	movups XMMWORD PTR [r14+r13*1],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 12.06
- Reference cycles: 12.06
- UOPS_PORT_0: 12.0

⇨ 2 μops that can only use port '0'

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	43 0f 11 04 2e       	movups XMMWORD PTR [r14+r13*1],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.03
- Reference cycles: 11.04
- UOPS_PORT_2: 11.0

⇨ One μop that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	43 0f 11 04 2e       	movups XMMWORD PTR [r14+r13*1],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 13.04
- Reference cycles: 13.05
- UOPS_PORT_3: 12.0

⇨ 2 μops that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	43 0f 11 04 2e       	movups XMMWORD PTR [r14+r13*1],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 13.04
- Reference cycles: 13.05
- UOPS_PORT_4: 12.0

⇨ 2 μops that can only use port '4'

With blocking instructions for port '5':

Code:

   0:	66 0f 3a 0d ca 02    	blendpd xmm1,xmm2,0x2
   6:	66 0f 3a 0d da 02    	blendpd xmm3,xmm2,0x2
   c:	66 0f 3a 0d e2 02    	blendpd xmm4,xmm2,0x2
  12:	66 0f 3a 0d ea 02    	blendpd xmm5,xmm2,0x2
  18:	66 0f 3a 0d f2 02    	blendpd xmm6,xmm2,0x2
  1e:	66 0f 3a 0d fa 02    	blendpd xmm7,xmm2,0x2
  24:	66 44 0f 3a 0d c2 02 	blendpd xmm8,xmm2,0x2
  2b:	66 44 0f 3a 0d ca 02 	blendpd xmm9,xmm2,0x2
  32:	66 44 0f 3a 0d d2 02 	blendpd xmm10,xmm2,0x2
  39:	66 44 0f 3a 0d da 02 	blendpd xmm11,xmm2,0x2
  40:	43 0f 11 04 2e       	movups XMMWORD PTR [r14+r13*1],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 12.3
- Reference cycles: 12.3
- UOPS_PORT_5: 10.75

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	41 0f 6e d0          	movd   mm2,r8d
  2c:	41 0f 6e d8          	movd   mm3,r8d
  30:	41 0f 6e e0          	movd   mm4,r8d
  34:	41 0f 6e e8          	movd   mm5,r8d
  38:	41 0f 6e f0          	movd   mm6,r8d
  3c:	41 0f 6e f8          	movd   mm7,r8d
  40:	41 0f 6e c0          	movd   mm0,r8d
  44:	41 0f 6e c8          	movd   mm1,r8d
  48:	43 0f 11 04 2e       	movups XMMWORD PTR [r14+r13*1],xmm0

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 19.0
- Core cycles: 10.58
- Reference cycles: 10.55
- UOPS_PORT_0: 10.56
- UOPS_PORT_5: 10.44

⇨ One μop that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 ca          	andnpd xmm1,xmm2
   4:	66 0f 55 da          	andnpd xmm3,xmm2
   8:	66 0f 55 e2          	andnpd xmm4,xmm2
   c:	66 0f 55 ea          	andnpd xmm5,xmm2
  10:	66 0f 55 f2          	andnpd xmm6,xmm2
  14:	66 0f 55 fa          	andnpd xmm7,xmm2
  18:	66 44 0f 55 c2       	andnpd xmm8,xmm2
  1d:	66 44 0f 55 ca       	andnpd xmm9,xmm2
  22:	66 44 0f 55 d2       	andnpd xmm10,xmm2
  27:	66 44 0f 55 da       	andnpd xmm11,xmm2
  2c:	66 44 0f 55 e2       	andnpd xmm12,xmm2
  31:	66 0f 55 ca          	andnpd xmm1,xmm2
  35:	66 0f 55 da          	andnpd xmm3,xmm2
  39:	66 0f 55 e2          	andnpd xmm4,xmm2
  3d:	66 0f 55 ea          	andnpd xmm5,xmm2
  41:	66 0f 55 f2          	andnpd xmm6,xmm2
  45:	66 0f 55 fa          	andnpd xmm7,xmm2
  49:	66 44 0f 55 c2       	andnpd xmm8,xmm2
  4e:	66 44 0f 55 ca       	andnpd xmm9,xmm2
  53:	66 44 0f 55 d2       	andnpd xmm10,xmm2
  58:	66 44 0f 55 da       	andnpd xmm11,xmm2
  5d:	66 44 0f 55 e2       	andnpd xmm12,xmm2
  62:	66 0f 55 ca          	andnpd xmm1,xmm2
  66:	66 0f 55 da          	andnpd xmm3,xmm2
  6a:	66 0f 55 e2          	andnpd xmm4,xmm2
  6e:	66 0f 55 ea          	andnpd xmm5,xmm2
  72:	66 0f 55 f2          	andnpd xmm6,xmm2
  76:	43 0f 11 04 2e       	movups XMMWORD PTR [r14+r13*1],xmm0

Init:

PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 28.0
- Core cycles: 29.11
- Reference cycles: 29.07
- UOPS_PORT_0: 10.89
- UOPS_PORT_1: 10.0
- UOPS_PORT_5: 10.11

⇨ One μop that can only use ports {'0', '1', '5'}