BTS (M32, R32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 45 8d 0e          	lea    r9w,[r14]
   4:	66 45 8d 16          	lea    r10w,[r14]
   8:	66 45 8d 1e          	lea    r11w,[r14]
   c:	66 45 8d 26          	lea    r12w,[r14]
  10:	66 41 8d 1e          	lea    bx,[r14]
  14:	66 41 8d 0e          	lea    cx,[r14]
  18:	66 41 8d 16          	lea    dx,[r14]
  1c:	66 45 8d 0e          	lea    r9w,[r14]
  20:	66 45 8d 16          	lea    r10w,[r14]
  24:	66 45 8d 1e          	lea    r11w,[r14]
  28:	66 45 8d 26          	lea    r12w,[r14]
  2c:	66 41 8d 1e          	lea    bx,[r14]
  30:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:
```
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.04
- Reference cycles: 13.01
- UOPS_PORT_0: 13.02

⇨ One μop that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  30:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  35:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
mov R8, 0

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 15.07
- Reference cycles: 15.07
- UOPS_PORT_1: 12.27

With blocking instructions for port '2':

Code:

   0:	66 45 8b 4e 40       	mov    r9w,WORD PTR [r14+0x40]
   5:	66 45 8b 56 42       	mov    r10w,WORD PTR [r14+0x42]
   a:	66 45 8b 5e 44       	mov    r11w,WORD PTR [r14+0x44]
   f:	66 45 8b 66 46       	mov    r12w,WORD PTR [r14+0x46]
  14:	66 41 8b 5e 48       	mov    bx,WORD PTR [r14+0x48]
  19:	66 41 8b 4e 4a       	mov    cx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 56 4c       	mov    dx,WORD PTR [r14+0x4c]
  23:	66 45 8b 4e 40       	mov    r9w,WORD PTR [r14+0x40]
  28:	66 45 8b 56 42       	mov    r10w,WORD PTR [r14+0x42]
  2d:	66 45 8b 5e 44       	mov    r11w,WORD PTR [r14+0x44]
  32:	66 45 8b 66 46       	mov    r12w,WORD PTR [r14+0x46]
  37:	66 41 8b 5e 48       	mov    bx,WORD PTR [r14+0x48]
  3c:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:
```
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.02
- Reference cycles: 13.01
- UOPS_PORT_2: 13.0

⇨ One μop that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 4e 40          	mov    QWORD PTR [r14+0x40],r9
   4:	4d 89 4e 48          	mov    QWORD PTR [r14+0x48],r9
   8:	4d 89 4e 50          	mov    QWORD PTR [r14+0x50],r9
   c:	4d 89 4e 58          	mov    QWORD PTR [r14+0x58],r9
  10:	4d 89 4e 60          	mov    QWORD PTR [r14+0x60],r9
  14:	4d 89 4e 68          	mov    QWORD PTR [r14+0x68],r9
  18:	4d 89 4e 70          	mov    QWORD PTR [r14+0x70],r9
  1c:	4d 89 4e 78          	mov    QWORD PTR [r14+0x78],r9
  20:	4d 89 8e 80 00 00 00 	mov    QWORD PTR [r14+0x80],r9
  27:	4d 89 8e 88 00 00 00 	mov    QWORD PTR [r14+0x88],r9
  2e:	4d 89 8e 90 00 00 00 	mov    QWORD PTR [r14+0x90],r9
  35:	4d 89 8e 98 00 00 00 	mov    QWORD PTR [r14+0x98],r9
  3c:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:
```
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.84
- Reference cycles: 13.83
- UOPS_PORT_3: 13.0

⇨ One μop that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 4e 40          	mov    QWORD PTR [r14+0x40],r9
   4:	4d 89 4e 48          	mov    QWORD PTR [r14+0x48],r9
   8:	4d 89 4e 50          	mov    QWORD PTR [r14+0x50],r9
   c:	4d 89 4e 58          	mov    QWORD PTR [r14+0x58],r9
  10:	4d 89 4e 60          	mov    QWORD PTR [r14+0x60],r9
  14:	4d 89 4e 68          	mov    QWORD PTR [r14+0x68],r9
  18:	4d 89 4e 70          	mov    QWORD PTR [r14+0x70],r9
  1c:	4d 89 4e 78          	mov    QWORD PTR [r14+0x78],r9
  20:	4d 89 8e 80 00 00 00 	mov    QWORD PTR [r14+0x80],r9
  27:	4d 89 8e 88 00 00 00 	mov    QWORD PTR [r14+0x88],r9
  2e:	4d 89 8e 90 00 00 00 	mov    QWORD PTR [r14+0x90],r9
  35:	4d 89 8e 98 00 00 00 	mov    QWORD PTR [r14+0x98],r9
  3c:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:
```
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.84
- Reference cycles: 13.83
- UOPS_PORT_4: 13.0

⇨ One μop that can only use port '4'

With blocking instructions for port '5':

Code:

   0:	66 0f 3a 0d c1 02    	blendpd xmm0,xmm1,0x2
   6:	66 0f 3a 0d d1 02    	blendpd xmm2,xmm1,0x2
   c:	66 0f 3a 0d d9 02    	blendpd xmm3,xmm1,0x2
  12:	66 0f 3a 0d e1 02    	blendpd xmm4,xmm1,0x2
  18:	66 0f 3a 0d e9 02    	blendpd xmm5,xmm1,0x2
  1e:	66 0f 3a 0d f1 02    	blendpd xmm6,xmm1,0x2
  24:	66 0f 3a 0d f9 02    	blendpd xmm7,xmm1,0x2
  2a:	66 44 0f 3a 0d c1 02 	blendpd xmm8,xmm1,0x2
  31:	66 44 0f 3a 0d c9 02 	blendpd xmm9,xmm1,0x2
  38:	66 44 0f 3a 0d d1 02 	blendpd xmm10,xmm1,0x2
  3f:	66 44 0f 3a 0d d9 02 	blendpd xmm11,xmm1,0x2
  46:	66 44 0f 3a 0d e1 02 	blendpd xmm12,xmm1,0x2
  4d:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
mov R8, 0

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 15.08
- Reference cycles: 15.07
- UOPS_PORT_5: 13.0

⇨ One μop that can only use port '5'

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c1          	movd   mm0,r9d
   4:	41 0f 6e c9          	movd   mm1,r9d
   8:	41 0f 6e d1          	movd   mm2,r9d
   c:	41 0f 6e d9          	movd   mm3,r9d
  10:	41 0f 6e e1          	movd   mm4,r9d
  14:	41 0f 6e e9          	movd   mm5,r9d
  18:	41 0f 6e f1          	movd   mm6,r9d
  1c:	41 0f 6e f9          	movd   mm7,r9d
  20:	41 0f 6e c1          	movd   mm0,r9d
  24:	41 0f 6e c9          	movd   mm1,r9d
  28:	41 0f 6e d1          	movd   mm2,r9d
  2c:	41 0f 6e d9          	movd   mm3,r9d
  30:	41 0f 6e e1          	movd   mm4,r9d
  34:	41 0f 6e e9          	movd   mm5,r9d
  38:	41 0f 6e f1          	movd   mm6,r9d
  3c:	41 0f 6e f9          	movd   mm7,r9d
  40:	41 0f 6e c1          	movd   mm0,r9d
  44:	41 0f 6e c9          	movd   mm1,r9d
  48:	41 0f 6e d1          	movd   mm2,r9d
  4c:	41 0f 6e d9          	movd   mm3,r9d
  50:	41 0f 6e e1          	movd   mm4,r9d
  54:	41 0f 6e e9          	movd   mm5,r9d
  58:	41 0f 6e f1          	movd   mm6,r9d
  5c:	41 0f 6e f9          	movd   mm7,r9d
  60:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:
```
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 13.63
- Reference cycles: 13.61
- UOPS_PORT_0: 13.56
- UOPS_PORT_5: 13.39

⇨ One μop that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	66 0f 55 c1          	andnpd xmm0,xmm1
  6e:	66 0f 55 d1          	andnpd xmm2,xmm1
  72:	66 0f 55 d9          	andnpd xmm3,xmm1
  76:	66 0f 55 e1          	andnpd xmm4,xmm1
  7a:	66 0f 55 e9          	andnpd xmm5,xmm1
  7e:	66 0f 55 f1          	andnpd xmm6,xmm1
  82:	66 0f 55 f9          	andnpd xmm7,xmm1
  86:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  8b:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  90:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  95:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  9a:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  9f:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:

PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
mov R8, 0

Show nanoBench command
Results:
- Instructions retired: 37.0
- Core cycles: 39.22
- Reference cycles: 39.33
- UOPS_PORT_0: 10.33
- UOPS_PORT_1: 16.15
- UOPS_PORT_5: 17.52

⇨ 5 μops that can only use ports {'0', '1', '5'}

With an indexed addressing mode

With blocking instructions for port '0':

Code:

   0:	66 45 8d 0e          	lea    r9w,[r14]
   4:	66 45 8d 16          	lea    r10w,[r14]
   8:	66 45 8d 1e          	lea    r11w,[r14]
   c:	66 45 8d 26          	lea    r12w,[r14]
  10:	66 41 8d 1e          	lea    bx,[r14]
  14:	66 41 8d 0e          	lea    cx,[r14]
  18:	66 41 8d 16          	lea    dx,[r14]
  1c:	66 45 8d 0e          	lea    r9w,[r14]
  20:	66 45 8d 16          	lea    r10w,[r14]
  24:	66 45 8d 1e          	lea    r11w,[r14]
  28:	66 45 8d 26          	lea    r12w,[r14]
  2c:	66 41 8d 1e          	lea    bx,[r14]
  30:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d

Init:
```
XOR R13, R13;
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.02
- Reference cycles: 13.01
- UOPS_PORT_0: 13.02

⇨ One μop that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  30:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  35:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
XOR R13, R13;
mov R8, 0

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 15.57
- Reference cycles: 15.54
- UOPS_PORT_1: 12.49

With blocking instructions for port '2':

Code:

   0:	66 45 8b 4e 40       	mov    r9w,WORD PTR [r14+0x40]
   5:	66 45 8b 56 42       	mov    r10w,WORD PTR [r14+0x42]
   a:	66 45 8b 5e 44       	mov    r11w,WORD PTR [r14+0x44]
   f:	66 45 8b 66 46       	mov    r12w,WORD PTR [r14+0x46]
  14:	66 41 8b 5e 48       	mov    bx,WORD PTR [r14+0x48]
  19:	66 41 8b 4e 4a       	mov    cx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 56 4c       	mov    dx,WORD PTR [r14+0x4c]
  23:	66 45 8b 4e 40       	mov    r9w,WORD PTR [r14+0x40]
  28:	66 45 8b 56 42       	mov    r10w,WORD PTR [r14+0x42]
  2d:	66 45 8b 5e 44       	mov    r11w,WORD PTR [r14+0x44]
  32:	66 45 8b 66 46       	mov    r12w,WORD PTR [r14+0x46]
  37:	66 41 8b 5e 48       	mov    bx,WORD PTR [r14+0x48]
  3c:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d

Init:
```
XOR R13, R13;
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.02
- Reference cycles: 13.01
- UOPS_PORT_2: 13.0

⇨ One μop that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 4e 40          	mov    QWORD PTR [r14+0x40],r9
   4:	4d 89 4e 48          	mov    QWORD PTR [r14+0x48],r9
   8:	4d 89 4e 50          	mov    QWORD PTR [r14+0x50],r9
   c:	4d 89 4e 58          	mov    QWORD PTR [r14+0x58],r9
  10:	4d 89 4e 60          	mov    QWORD PTR [r14+0x60],r9
  14:	4d 89 4e 68          	mov    QWORD PTR [r14+0x68],r9
  18:	4d 89 4e 70          	mov    QWORD PTR [r14+0x70],r9
  1c:	4d 89 4e 78          	mov    QWORD PTR [r14+0x78],r9
  20:	4d 89 8e 80 00 00 00 	mov    QWORD PTR [r14+0x80],r9
  27:	4d 89 8e 88 00 00 00 	mov    QWORD PTR [r14+0x88],r9
  2e:	4d 89 8e 90 00 00 00 	mov    QWORD PTR [r14+0x90],r9
  35:	4d 89 8e 98 00 00 00 	mov    QWORD PTR [r14+0x98],r9
  3c:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d

Init:
```
XOR R13, R13;
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.81
- Reference cycles: 13.77
- UOPS_PORT_3: 13.0

⇨ One μop that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 4e 40          	mov    QWORD PTR [r14+0x40],r9
   4:	4d 89 4e 48          	mov    QWORD PTR [r14+0x48],r9
   8:	4d 89 4e 50          	mov    QWORD PTR [r14+0x50],r9
   c:	4d 89 4e 58          	mov    QWORD PTR [r14+0x58],r9
  10:	4d 89 4e 60          	mov    QWORD PTR [r14+0x60],r9
  14:	4d 89 4e 68          	mov    QWORD PTR [r14+0x68],r9
  18:	4d 89 4e 70          	mov    QWORD PTR [r14+0x70],r9
  1c:	4d 89 4e 78          	mov    QWORD PTR [r14+0x78],r9
  20:	4d 89 8e 80 00 00 00 	mov    QWORD PTR [r14+0x80],r9
  27:	4d 89 8e 88 00 00 00 	mov    QWORD PTR [r14+0x88],r9
  2e:	4d 89 8e 90 00 00 00 	mov    QWORD PTR [r14+0x90],r9
  35:	4d 89 8e 98 00 00 00 	mov    QWORD PTR [r14+0x98],r9
  3c:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d

Init:
```
XOR R13, R13;
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.81
- Reference cycles: 13.77
- UOPS_PORT_4: 13.0

⇨ One μop that can only use port '4'

With blocking instructions for port '5':

Code:

   0:	66 0f 3a 0d c1 02    	blendpd xmm0,xmm1,0x2
   6:	66 0f 3a 0d d1 02    	blendpd xmm2,xmm1,0x2
   c:	66 0f 3a 0d d9 02    	blendpd xmm3,xmm1,0x2
  12:	66 0f 3a 0d e1 02    	blendpd xmm4,xmm1,0x2
  18:	66 0f 3a 0d e9 02    	blendpd xmm5,xmm1,0x2
  1e:	66 0f 3a 0d f1 02    	blendpd xmm6,xmm1,0x2
  24:	66 0f 3a 0d f9 02    	blendpd xmm7,xmm1,0x2
  2a:	66 44 0f 3a 0d c1 02 	blendpd xmm8,xmm1,0x2
  31:	66 44 0f 3a 0d c9 02 	blendpd xmm9,xmm1,0x2
  38:	66 44 0f 3a 0d d1 02 	blendpd xmm10,xmm1,0x2
  3f:	66 44 0f 3a 0d d9 02 	blendpd xmm11,xmm1,0x2
  46:	66 44 0f 3a 0d e1 02 	blendpd xmm12,xmm1,0x2
  4d:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
XOR R13, R13;
mov R8, 0

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 15.58
- Reference cycles: 15.58
- UOPS_PORT_5: 12.76

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c1          	movd   mm0,r9d
   4:	41 0f 6e c9          	movd   mm1,r9d
   8:	41 0f 6e d1          	movd   mm2,r9d
   c:	41 0f 6e d9          	movd   mm3,r9d
  10:	41 0f 6e e1          	movd   mm4,r9d
  14:	41 0f 6e e9          	movd   mm5,r9d
  18:	41 0f 6e f1          	movd   mm6,r9d
  1c:	41 0f 6e f9          	movd   mm7,r9d
  20:	41 0f 6e c1          	movd   mm0,r9d
  24:	41 0f 6e c9          	movd   mm1,r9d
  28:	41 0f 6e d1          	movd   mm2,r9d
  2c:	41 0f 6e d9          	movd   mm3,r9d
  30:	41 0f 6e e1          	movd   mm4,r9d
  34:	41 0f 6e e9          	movd   mm5,r9d
  38:	41 0f 6e f1          	movd   mm6,r9d
  3c:	41 0f 6e f9          	movd   mm7,r9d
  40:	41 0f 6e c1          	movd   mm0,r9d
  44:	41 0f 6e c9          	movd   mm1,r9d
  48:	41 0f 6e d1          	movd   mm2,r9d
  4c:	41 0f 6e d9          	movd   mm3,r9d
  50:	41 0f 6e e1          	movd   mm4,r9d
  54:	41 0f 6e e9          	movd   mm5,r9d
  58:	41 0f 6e f1          	movd   mm6,r9d
  5c:	41 0f 6e f9          	movd   mm7,r9d
  60:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d

Init:
```
XOR R13, R13;
mov R8, 0
```
Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 13.61
- Reference cycles: 13.61
- UOPS_PORT_0: 13.59
- UOPS_PORT_5: 13.41

⇨ 2 μops that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	66 0f 55 c1          	andnpd xmm0,xmm1
  6e:	66 0f 55 d1          	andnpd xmm2,xmm1
  72:	66 0f 55 d9          	andnpd xmm3,xmm1
  76:	66 0f 55 e1          	andnpd xmm4,xmm1
  7a:	66 0f 55 e9          	andnpd xmm5,xmm1
  7e:	66 0f 55 f1          	andnpd xmm6,xmm1
  82:	66 0f 55 f9          	andnpd xmm7,xmm1
  86:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  8b:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  90:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  95:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  9a:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  9f:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d

Init:

PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
XOR R13, R13;
mov R8, 0

Show nanoBench command
Results:
- Instructions retired: 37.0
- Core cycles: 39.7
- Reference cycles: 39.67
- UOPS_PORT_0: 10.33
- UOPS_PORT_1: 16.15
- UOPS_PORT_5: 17.52

⇨ 5 μops that can only use ports {'0', '1', '5'}