VUCOMISS (XMM, M32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c0          	movd   r8d,mm0
   4:	41 0f 7e c1          	movd   r9d,mm0
   8:	41 0f 7e c2          	movd   r10d,mm0
   c:	41 0f 7e c3          	movd   r11d,mm0
  10:	41 0f 7e c4          	movd   r12d,mm0
  14:	0f 7e c3             	movd   ebx,mm0
  17:	0f 7e c1             	movd   ecx,mm0
  1a:	0f 7e c2             	movd   edx,mm0
  1d:	41 0f 7e c0          	movd   r8d,mm0
  21:	41 0f 7e c1          	movd   r9d,mm0
  25:	c4 c1 78 2e 06       	vucomiss xmm0,DWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM0, MM0;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.05
- Reference cycles: 11.11
- UOPS_PORT_0: 11.01

⇨ One μop that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	47 8d 84 6e 80 00 00 	lea    r8d,[r14+r13*2+0x80]
   7:	00 
   8:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
   f:	00 
  10:	47 8d 94 6e 80 00 00 	lea    r10d,[r14+r13*2+0x80]
  17:	00 
  18:	47 8d 9c 6e 80 00 00 	lea    r11d,[r14+r13*2+0x80]
  1f:	00 
  20:	47 8d a4 6e 80 00 00 	lea    r12d,[r14+r13*2+0x80]
  27:	00 
  28:	43 8d 9c 6e 80 00 00 	lea    ebx,[r14+r13*2+0x80]
  2f:	00 
  30:	43 8d 8c 6e 80 00 00 	lea    ecx,[r14+r13*2+0x80]
  37:	00 
  38:	43 8d 94 6e 80 00 00 	lea    edx,[r14+r13*2+0x80]
  3f:	00 
  40:	47 8d 84 6e 80 00 00 	lea    r8d,[r14+r13*2+0x80]
  47:	00 
  48:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
  4f:	00 
  50:	c4 c1 78 2e 06       	vucomiss xmm0,DWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.07
- Reference cycles: 11.16
- UOPS_PORT_1: 10.99

⇨ One μop that can only use port '1'

With blocking instructions for ports {'2', '3'}:

Code:

   0:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
   4:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
   8:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
   c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  10:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  14:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  18:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  1c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  20:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  24:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  28:	c4 c1 78 2e 06       	vucomiss xmm0,DWORD PTR [r14]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.09
- Reference cycles: 6.01
- UOPS_PORT_2: 5.5
- UOPS_PORT_3: 5.5

⇨ One μop that can only use ports {'2', '3'}

With an indexed addressing mode

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c0          	movd   r8d,mm0
   4:	41 0f 7e c1          	movd   r9d,mm0
   8:	41 0f 7e c2          	movd   r10d,mm0
   c:	41 0f 7e c3          	movd   r11d,mm0
  10:	41 0f 7e c4          	movd   r12d,mm0
  14:	0f 7e c3             	movd   ebx,mm0
  17:	0f 7e c1             	movd   ecx,mm0
  1a:	0f 7e c2             	movd   edx,mm0
  1d:	41 0f 7e c0          	movd   r8d,mm0
  21:	41 0f 7e c1          	movd   r9d,mm0
  25:	c4 81 78 2e 04 2e    	vucomiss xmm0,DWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM0, MM0;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.04
- Reference cycles: 11.16
- UOPS_PORT_0: 11.0

⇨ One μop that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	47 8d 84 6e 80 00 00 	lea    r8d,[r14+r13*2+0x80]
   7:	00 
   8:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
   f:	00 
  10:	47 8d 94 6e 80 00 00 	lea    r10d,[r14+r13*2+0x80]
  17:	00 
  18:	47 8d 9c 6e 80 00 00 	lea    r11d,[r14+r13*2+0x80]
  1f:	00 
  20:	47 8d a4 6e 80 00 00 	lea    r12d,[r14+r13*2+0x80]
  27:	00 
  28:	43 8d 9c 6e 80 00 00 	lea    ebx,[r14+r13*2+0x80]
  2f:	00 
  30:	43 8d 8c 6e 80 00 00 	lea    ecx,[r14+r13*2+0x80]
  37:	00 
  38:	43 8d 94 6e 80 00 00 	lea    edx,[r14+r13*2+0x80]
  3f:	00 
  40:	47 8d 84 6e 80 00 00 	lea    r8d,[r14+r13*2+0x80]
  47:	00 
  48:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
  4f:	00 
  50:	c4 81 78 2e 04 2e    	vucomiss xmm0,DWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.04
- Reference cycles: 11.11
- UOPS_PORT_1: 10.99

⇨ One μop that can only use port '1'

With blocking instructions for ports {'2', '3'}:

Code:

   0:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
   4:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
   8:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
   c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  10:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  14:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  18:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  1c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  20:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  24:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  28:	c4 81 78 2e 04 2e    	vucomiss xmm0,DWORD PTR [r14+r13*1]

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM0, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.95
- Reference cycles: 6.01
- UOPS_PORT_2: 5.5
- UOPS_PORT_3: 5.5

⇨ One μop that can only use ports {'2', '3'}