VSQRTPD (YMM, YMM) - Port Usage (IACA 2.1)
With blocking instructions for port '0':
Throughput Analysis Report
--------------------------
Block Throughput: 86.00 Cycles Throughput Bottleneck: Port0
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 86.0 42.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 1.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
------------------------------------------------------------------------------
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm7, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm8, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm9, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm10, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm11, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm12, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm1, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm5, xmm3, xmm4
| 1 | 1.0 | | | | | | CP | vcvtss2sd xmm6, xmm3, xmm4
| 3 | 2.0 42.0 | | | | | 1.0 | CP | vsqrtpd ymm2, ymm0
Total Num Of Uops: 87
⇨ 2 μops that can only use port '0'
With blocking instructions for port '5':
Throughput Analysis Report
--------------------------
Block Throughput: 84.00 Cycles Throughput Bottleneck: Port5
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 3.0 42.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 84.0 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm7, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm8, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm9, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm10, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm11, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm12, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm1, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm5, xmm3, xmm4
| 1 | | | | | | 1.0 | CP | vandnpd xmm6, xmm3, xmm4
| 3 | 3.0 42.0 | | | | | | | vsqrtpd ymm2, ymm0
Total Num Of Uops: 87
With blocking instructions for ports {'0', '5'}:
Throughput Analysis Report
--------------------------
Block Throughput: 51.50 Cycles Throughput Bottleneck: Port0, Port5
Port Binding In Cycles Per Iteration:
-------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 |
-------------------------------------------------------------------------
| Cycles | 51.5 42.0 | 0.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 51.5 |
-------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r12w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar bx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar cx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar dx, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r8w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r9w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r10w, 0x0
| 1 | 0.5 | | | | | 0.5 | CP | sar r11w, 0x0
| 3 | 2.0 42.0 | | | | | 1.0 | CP | vsqrtpd ymm2, ymm0
Total Num Of Uops: 103
⇨ One μop that can only use ports {'0', '5'}