RDTSC - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c0          	movd   r8d,mm0
   4:	41 0f 7e c1          	movd   r9d,mm0
   8:	41 0f 7e c2          	movd   r10d,mm0
   c:	41 0f 7e c3          	movd   r11d,mm0
  10:	41 0f 7e c4          	movd   r12d,mm0
  14:	0f 7e c3             	movd   ebx,mm0
  17:	0f 7e c1             	movd   ecx,mm0
  1a:	41 0f 7e c0          	movd   r8d,mm0
  1e:	41 0f 7e c1          	movd   r9d,mm0
  22:	41 0f 7e c2          	movd   r10d,mm0
  26:	41 0f 7e c3          	movd   r11d,mm0
  2a:	41 0f 7e c4          	movd   r12d,mm0
  2e:	0f 7e c3             	movd   ebx,mm0
  31:	0f 7e c1             	movd   ecx,mm0
  34:	41 0f 7e c0          	movd   r8d,mm0
  38:	41 0f 7e c1          	movd   r9d,mm0
  3c:	41 0f 7e c2          	movd   r10d,mm0
  40:	41 0f 7e c3          	movd   r11d,mm0
  44:	41 0f 7e c4          	movd   r12d,mm0
  48:	0f 7e c3             	movd   ebx,mm0
  4b:	0f 7e c1             	movd   ecx,mm0
  4e:	41 0f 7e c0          	movd   r8d,mm0
  52:	41 0f 7e c1          	movd   r9d,mm0
  56:	41 0f 7e c2          	movd   r10d,mm0
  5a:	41 0f 7e c3          	movd   r11d,mm0
  5e:	41 0f 7e c4          	movd   r12d,mm0
  62:	0f 7e c3             	movd   ebx,mm0
  65:	0f 7e c1             	movd   ecx,mm0
  68:	41 0f 7e c0          	movd   r8d,mm0
  6c:	41 0f 7e c1          	movd   r9d,mm0
  70:	41 0f 7e c2          	movd   r10d,mm0
  74:	41 0f 7e c3          	movd   r11d,mm0
  78:	41 0f 7e c4          	movd   r12d,mm0
  7c:	0f 7e c3             	movd   ebx,mm0
  7f:	0f 7e c1             	movd   ecx,mm0
  82:	41 0f 7e c0          	movd   r8d,mm0
  86:	41 0f 7e c1          	movd   r9d,mm0
  8a:	41 0f 7e c2          	movd   r10d,mm0
  8e:	41 0f 7e c3          	movd   r11d,mm0
  92:	41 0f 7e c4          	movd   r12d,mm0
  96:	0f 7e c3             	movd   ebx,mm0
  99:	0f 7e c1             	movd   ecx,mm0
  9c:	41 0f 7e c0          	movd   r8d,mm0
  a0:	41 0f 7e c1          	movd   r9d,mm0
  a4:	41 0f 7e c2          	movd   r10d,mm0
  a8:	41 0f 7e c3          	movd   r11d,mm0
  ac:	41 0f 7e c4          	movd   r12d,mm0
  b0:	0f 7e c3             	movd   ebx,mm0
  b3:	0f 7e c1             	movd   ecx,mm0
  b6:	41 0f 7e c0          	movd   r8d,mm0
  ba:	41 0f 7e c1          	movd   r9d,mm0
  be:	41 0f 7e c2          	movd   r10d,mm0
  c2:	41 0f 7e c3          	movd   r11d,mm0
  c6:	41 0f 7e c4          	movd   r12d,mm0
  ca:	0f 7e c3             	movd   ebx,mm0
  cd:	0f 7e c1             	movd   ecx,mm0
  d0:	0f 31                	rdtsc

Init:
```
PXOR MM0, MM0
```
Show nanoBench command
Results:
- Instructions retired: 57.0
- Core cycles: 56.47
- Reference cycles: 56.67
- UOPS_PORT_0: 56.02

With blocking instructions for port '1':

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  30:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  35:	66 0f 58 c1          	addpd  xmm0,xmm1
  39:	66 0f 58 d1          	addpd  xmm2,xmm1
  3d:	66 0f 58 d9          	addpd  xmm3,xmm1
  41:	66 0f 58 e1          	addpd  xmm4,xmm1
  45:	66 0f 58 e9          	addpd  xmm5,xmm1
  49:	66 0f 58 f1          	addpd  xmm6,xmm1
  4d:	66 0f 58 f9          	addpd  xmm7,xmm1
  51:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  56:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  5b:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  60:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  65:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  6a:	66 0f 58 c1          	addpd  xmm0,xmm1
  6e:	66 0f 58 d1          	addpd  xmm2,xmm1
  72:	66 0f 58 d9          	addpd  xmm3,xmm1
  76:	66 0f 58 e1          	addpd  xmm4,xmm1
  7a:	66 0f 58 e9          	addpd  xmm5,xmm1
  7e:	66 0f 58 f1          	addpd  xmm6,xmm1
  82:	66 0f 58 f9          	addpd  xmm7,xmm1
  86:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  8b:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  90:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  95:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  9a:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  9f:	66 0f 58 c1          	addpd  xmm0,xmm1
  a3:	66 0f 58 d1          	addpd  xmm2,xmm1
  a7:	66 0f 58 d9          	addpd  xmm3,xmm1
  ab:	66 0f 58 e1          	addpd  xmm4,xmm1
  af:	66 0f 58 e9          	addpd  xmm5,xmm1
  b3:	66 0f 58 f1          	addpd  xmm6,xmm1
  b7:	66 0f 58 f9          	addpd  xmm7,xmm1
  bb:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  c0:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  c5:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  ca:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  cf:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  d4:	66 0f 58 c1          	addpd  xmm0,xmm1
  d8:	66 0f 58 d1          	addpd  xmm2,xmm1
  dc:	66 0f 58 d9          	addpd  xmm3,xmm1
  e0:	66 0f 58 e1          	addpd  xmm4,xmm1
  e4:	66 0f 58 e9          	addpd  xmm5,xmm1
  e8:	66 0f 58 f1          	addpd  xmm6,xmm1
  ec:	66 0f 58 f9          	addpd  xmm7,xmm1
  f0:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  f5:	0f 31                	rdtsc

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 57.0
- Core cycles: 59.59
- Reference cycles: 60.0
- UOPS_PORT_1: 58.94

⇨ 3 μops that can only use port '1'

With blocking instructions for port '5':

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	66 0f 55 c1          	andnpd xmm0,xmm1
  6e:	66 0f 55 d1          	andnpd xmm2,xmm1
  72:	66 0f 55 d9          	andnpd xmm3,xmm1
  76:	66 0f 55 e1          	andnpd xmm4,xmm1
  7a:	66 0f 55 e9          	andnpd xmm5,xmm1
  7e:	66 0f 55 f1          	andnpd xmm6,xmm1
  82:	66 0f 55 f9          	andnpd xmm7,xmm1
  86:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  8b:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  90:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  95:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  9a:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  9f:	66 0f 55 c1          	andnpd xmm0,xmm1
  a3:	66 0f 55 d1          	andnpd xmm2,xmm1
  a7:	66 0f 55 d9          	andnpd xmm3,xmm1
  ab:	66 0f 55 e1          	andnpd xmm4,xmm1
  af:	66 0f 55 e9          	andnpd xmm5,xmm1
  b3:	66 0f 55 f1          	andnpd xmm6,xmm1
  b7:	66 0f 55 f9          	andnpd xmm7,xmm1
  bb:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  c0:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  c5:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  ca:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  cf:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  d4:	66 0f 55 c1          	andnpd xmm0,xmm1
  d8:	66 0f 55 d1          	andnpd xmm2,xmm1
  dc:	66 0f 55 d9          	andnpd xmm3,xmm1
  e0:	66 0f 55 e1          	andnpd xmm4,xmm1
  e4:	66 0f 55 e9          	andnpd xmm5,xmm1
  e8:	66 0f 55 f1          	andnpd xmm6,xmm1
  ec:	66 0f 55 f9          	andnpd xmm7,xmm1
  f0:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  f5:	0f 31                	rdtsc

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 57.0
- Core cycles: 65.24
- Reference cycles: 64.33
- UOPS_PORT_5: 62.0

⇨ 6 μops that can only use port '5'

With blocking instructions for ports {'0', '1'}:

Code:

   0:	45 8d 06             	lea    r8d,[r14]
   3:	45 8d 0e             	lea    r9d,[r14]
   6:	45 8d 16             	lea    r10d,[r14]
   9:	45 8d 1e             	lea    r11d,[r14]
   c:	45 8d 26             	lea    r12d,[r14]
   f:	41 8d 1e             	lea    ebx,[r14]
  12:	41 8d 0e             	lea    ecx,[r14]
  15:	45 8d 06             	lea    r8d,[r14]
  18:	45 8d 0e             	lea    r9d,[r14]
  1b:	45 8d 16             	lea    r10d,[r14]
  1e:	45 8d 1e             	lea    r11d,[r14]
  21:	45 8d 26             	lea    r12d,[r14]
  24:	41 8d 1e             	lea    ebx,[r14]
  27:	41 8d 0e             	lea    ecx,[r14]
  2a:	45 8d 06             	lea    r8d,[r14]
  2d:	45 8d 0e             	lea    r9d,[r14]
  30:	45 8d 16             	lea    r10d,[r14]
  33:	45 8d 1e             	lea    r11d,[r14]
  36:	45 8d 26             	lea    r12d,[r14]
  39:	41 8d 1e             	lea    ebx,[r14]
  3c:	41 8d 0e             	lea    ecx,[r14]
  3f:	45 8d 06             	lea    r8d,[r14]
  42:	45 8d 0e             	lea    r9d,[r14]
  45:	45 8d 16             	lea    r10d,[r14]
  48:	45 8d 1e             	lea    r11d,[r14]
  4b:	45 8d 26             	lea    r12d,[r14]
  4e:	41 8d 1e             	lea    ebx,[r14]
  51:	41 8d 0e             	lea    ecx,[r14]
  54:	45 8d 06             	lea    r8d,[r14]
  57:	45 8d 0e             	lea    r9d,[r14]
  5a:	45 8d 16             	lea    r10d,[r14]
  5d:	45 8d 1e             	lea    r11d,[r14]
  60:	45 8d 26             	lea    r12d,[r14]
  63:	41 8d 1e             	lea    ebx,[r14]
  66:	41 8d 0e             	lea    ecx,[r14]
  69:	45 8d 06             	lea    r8d,[r14]
  6c:	45 8d 0e             	lea    r9d,[r14]
  6f:	45 8d 16             	lea    r10d,[r14]
  72:	45 8d 1e             	lea    r11d,[r14]
  75:	45 8d 26             	lea    r12d,[r14]
  78:	41 8d 1e             	lea    ebx,[r14]
  7b:	41 8d 0e             	lea    ecx,[r14]
  7e:	45 8d 06             	lea    r8d,[r14]
  81:	45 8d 0e             	lea    r9d,[r14]
  84:	45 8d 16             	lea    r10d,[r14]
  87:	45 8d 1e             	lea    r11d,[r14]
  8a:	45 8d 26             	lea    r12d,[r14]
  8d:	41 8d 1e             	lea    ebx,[r14]
  90:	41 8d 0e             	lea    ecx,[r14]
  93:	45 8d 06             	lea    r8d,[r14]
  96:	45 8d 0e             	lea    r9d,[r14]
  99:	45 8d 16             	lea    r10d,[r14]
  9c:	45 8d 1e             	lea    r11d,[r14]
  9f:	45 8d 26             	lea    r12d,[r14]
  a2:	41 8d 1e             	lea    ebx,[r14]
  a5:	41 8d 0e             	lea    ecx,[r14]
  a8:	45 8d 06             	lea    r8d,[r14]
  ab:	45 8d 0e             	lea    r9d,[r14]
  ae:	45 8d 16             	lea    r10d,[r14]
  b1:	45 8d 1e             	lea    r11d,[r14]
  b4:	45 8d 26             	lea    r12d,[r14]
  b7:	41 8d 1e             	lea    ebx,[r14]
  ba:	41 8d 0e             	lea    ecx,[r14]
  bd:	45 8d 06             	lea    r8d,[r14]
  c0:	45 8d 0e             	lea    r9d,[r14]
  c3:	45 8d 16             	lea    r10d,[r14]
  c6:	45 8d 1e             	lea    r11d,[r14]
  c9:	45 8d 26             	lea    r12d,[r14]
  cc:	41 8d 1e             	lea    ebx,[r14]
  cf:	41 8d 0e             	lea    ecx,[r14]
  d2:	45 8d 06             	lea    r8d,[r14]
  d5:	45 8d 0e             	lea    r9d,[r14]
  d8:	45 8d 16             	lea    r10d,[r14]
  db:	45 8d 1e             	lea    r11d,[r14]
  de:	45 8d 26             	lea    r12d,[r14]
  e1:	41 8d 1e             	lea    ebx,[r14]
  e4:	41 8d 0e             	lea    ecx,[r14]
  e7:	45 8d 06             	lea    r8d,[r14]
  ea:	45 8d 0e             	lea    r9d,[r14]
  ed:	45 8d 16             	lea    r10d,[r14]
  f0:	45 8d 1e             	lea    r11d,[r14]
  f3:	45 8d 26             	lea    r12d,[r14]
  f6:	41 8d 1e             	lea    ebx,[r14]
  f9:	41 8d 0e             	lea    ecx,[r14]
  fc:	45 8d 06             	lea    r8d,[r14]
  ff:	45 8d 0e             	lea    r9d,[r14]
 102:	45 8d 16             	lea    r10d,[r14]
 105:	45 8d 1e             	lea    r11d,[r14]
 108:	45 8d 26             	lea    r12d,[r14]
 10b:	41 8d 1e             	lea    ebx,[r14]
 10e:	41 8d 0e             	lea    ecx,[r14]
 111:	45 8d 06             	lea    r8d,[r14]
 114:	45 8d 0e             	lea    r9d,[r14]
 117:	45 8d 16             	lea    r10d,[r14]
 11a:	45 8d 1e             	lea    r11d,[r14]
 11d:	45 8d 26             	lea    r12d,[r14]
 120:	41 8d 1e             	lea    ebx,[r14]
 123:	41 8d 0e             	lea    ecx,[r14]
 126:	45 8d 06             	lea    r8d,[r14]
 129:	45 8d 0e             	lea    r9d,[r14]
 12c:	0f 31                	rdtsc

Show nanoBench command
Results:
- Instructions retired: 101.0
- Core cycles: 53.8
- Reference cycles: 53.83
- UOPS_PORT_1: 50.7
- UOPS_PORT_0: 52.4

With blocking instructions for ports {'0', '5'}:

Code:

   0:	66 41 c1 f8 00       	sar    r8w,0x0
   5:	66 41 c1 f9 00       	sar    r9w,0x0
   a:	66 41 c1 fa 00       	sar    r10w,0x0
   f:	66 41 c1 fb 00       	sar    r11w,0x0
  14:	66 41 c1 fc 00       	sar    r12w,0x0
  19:	66 c1 fb 00          	sar    bx,0x0
  1d:	66 c1 f9 00          	sar    cx,0x0
  21:	66 41 c1 f8 00       	sar    r8w,0x0
  26:	66 41 c1 f9 00       	sar    r9w,0x0
  2b:	66 41 c1 fa 00       	sar    r10w,0x0
  30:	66 41 c1 fb 00       	sar    r11w,0x0
  35:	66 41 c1 fc 00       	sar    r12w,0x0
  3a:	66 c1 fb 00          	sar    bx,0x0
  3e:	66 c1 f9 00          	sar    cx,0x0
  42:	66 41 c1 f8 00       	sar    r8w,0x0
  47:	66 41 c1 f9 00       	sar    r9w,0x0
  4c:	66 41 c1 fa 00       	sar    r10w,0x0
  51:	66 41 c1 fb 00       	sar    r11w,0x0
  56:	66 41 c1 fc 00       	sar    r12w,0x0
  5b:	66 c1 fb 00          	sar    bx,0x0
  5f:	66 c1 f9 00          	sar    cx,0x0
  63:	66 41 c1 f8 00       	sar    r8w,0x0
  68:	66 41 c1 f9 00       	sar    r9w,0x0
  6d:	66 41 c1 fa 00       	sar    r10w,0x0
  72:	66 41 c1 fb 00       	sar    r11w,0x0
  77:	66 41 c1 fc 00       	sar    r12w,0x0
  7c:	66 c1 fb 00          	sar    bx,0x0
  80:	66 c1 f9 00          	sar    cx,0x0
  84:	66 41 c1 f8 00       	sar    r8w,0x0
  89:	66 41 c1 f9 00       	sar    r9w,0x0
  8e:	66 41 c1 fa 00       	sar    r10w,0x0
  93:	66 41 c1 fb 00       	sar    r11w,0x0
  98:	66 41 c1 fc 00       	sar    r12w,0x0
  9d:	66 c1 fb 00          	sar    bx,0x0
  a1:	66 c1 f9 00          	sar    cx,0x0
  a5:	66 41 c1 f8 00       	sar    r8w,0x0
  aa:	66 41 c1 f9 00       	sar    r9w,0x0
  af:	66 41 c1 fa 00       	sar    r10w,0x0
  b4:	66 41 c1 fb 00       	sar    r11w,0x0
  b9:	66 41 c1 fc 00       	sar    r12w,0x0
  be:	66 c1 fb 00          	sar    bx,0x0
  c2:	66 c1 f9 00          	sar    cx,0x0
  c6:	66 41 c1 f8 00       	sar    r8w,0x0
  cb:	66 41 c1 f9 00       	sar    r9w,0x0
  d0:	66 41 c1 fa 00       	sar    r10w,0x0
  d5:	66 41 c1 fb 00       	sar    r11w,0x0
  da:	66 41 c1 fc 00       	sar    r12w,0x0
  df:	66 c1 fb 00          	sar    bx,0x0
  e3:	66 c1 f9 00          	sar    cx,0x0
  e7:	66 41 c1 f8 00       	sar    r8w,0x0
  ec:	66 41 c1 f9 00       	sar    r9w,0x0
  f1:	66 41 c1 fa 00       	sar    r10w,0x0
  f6:	66 41 c1 fb 00       	sar    r11w,0x0
  fb:	66 41 c1 fc 00       	sar    r12w,0x0
 100:	66 c1 fb 00          	sar    bx,0x0
 104:	66 c1 f9 00          	sar    cx,0x0
 108:	66 41 c1 f8 00       	sar    r8w,0x0
 10d:	66 41 c1 f9 00       	sar    r9w,0x0
 112:	66 41 c1 fa 00       	sar    r10w,0x0
 117:	66 41 c1 fb 00       	sar    r11w,0x0
 11c:	66 41 c1 fc 00       	sar    r12w,0x0
 121:	66 c1 fb 00          	sar    bx,0x0
 125:	66 c1 f9 00          	sar    cx,0x0
 129:	66 41 c1 f8 00       	sar    r8w,0x0
 12e:	66 41 c1 f9 00       	sar    r9w,0x0
 133:	66 41 c1 fa 00       	sar    r10w,0x0
 138:	66 41 c1 fb 00       	sar    r11w,0x0
 13d:	66 41 c1 fc 00       	sar    r12w,0x0
 142:	66 c1 fb 00          	sar    bx,0x0
 146:	66 c1 f9 00          	sar    cx,0x0
 14a:	66 41 c1 f8 00       	sar    r8w,0x0
 14f:	66 41 c1 f9 00       	sar    r9w,0x0
 154:	66 41 c1 fa 00       	sar    r10w,0x0
 159:	66 41 c1 fb 00       	sar    r11w,0x0
 15e:	66 41 c1 fc 00       	sar    r12w,0x0
 163:	66 c1 fb 00          	sar    bx,0x0
 167:	66 c1 f9 00          	sar    cx,0x0
 16b:	66 41 c1 f8 00       	sar    r8w,0x0
 170:	66 41 c1 f9 00       	sar    r9w,0x0
 175:	66 41 c1 fa 00       	sar    r10w,0x0
 17a:	66 41 c1 fb 00       	sar    r11w,0x0
 17f:	66 41 c1 fc 00       	sar    r12w,0x0
 184:	66 c1 fb 00          	sar    bx,0x0
 188:	66 c1 f9 00          	sar    cx,0x0
 18c:	66 41 c1 f8 00       	sar    r8w,0x0
 191:	66 41 c1 f9 00       	sar    r9w,0x0
 196:	66 41 c1 fa 00       	sar    r10w,0x0
 19b:	66 41 c1 fb 00       	sar    r11w,0x0
 1a0:	66 41 c1 fc 00       	sar    r12w,0x0
 1a5:	66 c1 fb 00          	sar    bx,0x0
 1a9:	66 c1 f9 00          	sar    cx,0x0
 1ad:	66 41 c1 f8 00       	sar    r8w,0x0
 1b2:	66 41 c1 f9 00       	sar    r9w,0x0
 1b7:	66 41 c1 fa 00       	sar    r10w,0x0
 1bc:	66 41 c1 fb 00       	sar    r11w,0x0
 1c1:	66 41 c1 fc 00       	sar    r12w,0x0
 1c6:	66 c1 fb 00          	sar    bx,0x0
 1ca:	66 c1 f9 00          	sar    cx,0x0
 1ce:	66 41 c1 f8 00       	sar    r8w,0x0
 1d3:	66 41 c1 f9 00       	sar    r9w,0x0
 1d8:	0f 31                	rdtsc

Show nanoBench command
Results:
- Instructions retired: 101.0
- Core cycles: 57.15
- Reference cycles: 57.8
- UOPS_PORT_5: 52.9
- UOPS_PORT_0: 54.2

⇨ One μop that can only use ports {'0', '5'}

With blocking instructions for ports {'1', '5'}:

Code:

   0:	0f 38 1c c1          	pabsb  mm0,mm1
   4:	0f 38 1c d1          	pabsb  mm2,mm1
   8:	0f 38 1c d9          	pabsb  mm3,mm1
   c:	0f 38 1c e1          	pabsb  mm4,mm1
  10:	0f 38 1c e9          	pabsb  mm5,mm1
  14:	0f 38 1c f1          	pabsb  mm6,mm1
  18:	0f 38 1c f9          	pabsb  mm7,mm1
  1c:	0f 38 1c c1          	pabsb  mm0,mm1
  20:	0f 38 1c d1          	pabsb  mm2,mm1
  24:	0f 38 1c d9          	pabsb  mm3,mm1
  28:	0f 38 1c e1          	pabsb  mm4,mm1
  2c:	0f 38 1c e9          	pabsb  mm5,mm1
  30:	0f 38 1c f1          	pabsb  mm6,mm1
  34:	0f 38 1c f9          	pabsb  mm7,mm1
  38:	0f 38 1c c1          	pabsb  mm0,mm1
  3c:	0f 38 1c d1          	pabsb  mm2,mm1
  40:	0f 38 1c d9          	pabsb  mm3,mm1
  44:	0f 38 1c e1          	pabsb  mm4,mm1
  48:	0f 38 1c e9          	pabsb  mm5,mm1
  4c:	0f 38 1c f1          	pabsb  mm6,mm1
  50:	0f 38 1c f9          	pabsb  mm7,mm1
  54:	0f 38 1c c1          	pabsb  mm0,mm1
  58:	0f 38 1c d1          	pabsb  mm2,mm1
  5c:	0f 38 1c d9          	pabsb  mm3,mm1
  60:	0f 38 1c e1          	pabsb  mm4,mm1
  64:	0f 38 1c e9          	pabsb  mm5,mm1
  68:	0f 38 1c f1          	pabsb  mm6,mm1
  6c:	0f 38 1c f9          	pabsb  mm7,mm1
  70:	0f 38 1c c1          	pabsb  mm0,mm1
  74:	0f 38 1c d1          	pabsb  mm2,mm1
  78:	0f 38 1c d9          	pabsb  mm3,mm1
  7c:	0f 38 1c e1          	pabsb  mm4,mm1
  80:	0f 38 1c e9          	pabsb  mm5,mm1
  84:	0f 38 1c f1          	pabsb  mm6,mm1
  88:	0f 38 1c f9          	pabsb  mm7,mm1
  8c:	0f 38 1c c1          	pabsb  mm0,mm1
  90:	0f 38 1c d1          	pabsb  mm2,mm1
  94:	0f 38 1c d9          	pabsb  mm3,mm1
  98:	0f 38 1c e1          	pabsb  mm4,mm1
  9c:	0f 38 1c e9          	pabsb  mm5,mm1
  a0:	0f 38 1c f1          	pabsb  mm6,mm1
  a4:	0f 38 1c f9          	pabsb  mm7,mm1
  a8:	0f 38 1c c1          	pabsb  mm0,mm1
  ac:	0f 38 1c d1          	pabsb  mm2,mm1
  b0:	0f 38 1c d9          	pabsb  mm3,mm1
  b4:	0f 38 1c e1          	pabsb  mm4,mm1
  b8:	0f 38 1c e9          	pabsb  mm5,mm1
  bc:	0f 38 1c f1          	pabsb  mm6,mm1
  c0:	0f 38 1c f9          	pabsb  mm7,mm1
  c4:	0f 38 1c c1          	pabsb  mm0,mm1
  c8:	0f 38 1c d1          	pabsb  mm2,mm1
  cc:	0f 38 1c d9          	pabsb  mm3,mm1
  d0:	0f 38 1c e1          	pabsb  mm4,mm1
  d4:	0f 38 1c e9          	pabsb  mm5,mm1
  d8:	0f 38 1c f1          	pabsb  mm6,mm1
  dc:	0f 38 1c f9          	pabsb  mm7,mm1
  e0:	0f 38 1c c1          	pabsb  mm0,mm1
  e4:	0f 38 1c d1          	pabsb  mm2,mm1
  e8:	0f 38 1c d9          	pabsb  mm3,mm1
  ec:	0f 38 1c e1          	pabsb  mm4,mm1
  f0:	0f 38 1c e9          	pabsb  mm5,mm1
  f4:	0f 38 1c f1          	pabsb  mm6,mm1
  f8:	0f 38 1c f9          	pabsb  mm7,mm1
  fc:	0f 38 1c c1          	pabsb  mm0,mm1
 100:	0f 38 1c d1          	pabsb  mm2,mm1
 104:	0f 38 1c d9          	pabsb  mm3,mm1
 108:	0f 38 1c e1          	pabsb  mm4,mm1
 10c:	0f 38 1c e9          	pabsb  mm5,mm1
 110:	0f 38 1c f1          	pabsb  mm6,mm1
 114:	0f 38 1c f9          	pabsb  mm7,mm1
 118:	0f 38 1c c1          	pabsb  mm0,mm1
 11c:	0f 38 1c d1          	pabsb  mm2,mm1
 120:	0f 38 1c d9          	pabsb  mm3,mm1
 124:	0f 38 1c e1          	pabsb  mm4,mm1
 128:	0f 38 1c e9          	pabsb  mm5,mm1
 12c:	0f 38 1c f1          	pabsb  mm6,mm1
 130:	0f 38 1c f9          	pabsb  mm7,mm1
 134:	0f 38 1c c1          	pabsb  mm0,mm1
 138:	0f 38 1c d1          	pabsb  mm2,mm1
 13c:	0f 38 1c d9          	pabsb  mm3,mm1
 140:	0f 38 1c e1          	pabsb  mm4,mm1
 144:	0f 38 1c e9          	pabsb  mm5,mm1
 148:	0f 38 1c f1          	pabsb  mm6,mm1
 14c:	0f 38 1c f9          	pabsb  mm7,mm1
 150:	0f 38 1c c1          	pabsb  mm0,mm1
 154:	0f 38 1c d1          	pabsb  mm2,mm1
 158:	0f 38 1c d9          	pabsb  mm3,mm1
 15c:	0f 38 1c e1          	pabsb  mm4,mm1
 160:	0f 38 1c e9          	pabsb  mm5,mm1
 164:	0f 38 1c f1          	pabsb  mm6,mm1
 168:	0f 38 1c f9          	pabsb  mm7,mm1
 16c:	0f 38 1c c1          	pabsb  mm0,mm1
 170:	0f 38 1c d1          	pabsb  mm2,mm1
 174:	0f 38 1c d9          	pabsb  mm3,mm1
 178:	0f 38 1c e1          	pabsb  mm4,mm1
 17c:	0f 38 1c e9          	pabsb  mm5,mm1
 180:	0f 38 1c f1          	pabsb  mm6,mm1
 184:	0f 38 1c f9          	pabsb  mm7,mm1
 188:	0f 38 1c c1          	pabsb  mm0,mm1
 18c:	0f 38 1c d1          	pabsb  mm2,mm1
 190:	0f 31                	rdtsc

Init:
```
VZEROALL;
PXOR MM1, MM1
```
Show nanoBench command
Results:
- Instructions retired: 101.0
- Core cycles: 58.3
- Reference cycles: 57.8
- UOPS_PORT_5: 54.1
- UOPS_PORT_1: 55.8

⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	41 b0 00             	mov    r8b,0x0
   3:	41 b1 00             	mov    r9b,0x0
   6:	41 b2 00             	mov    r10b,0x0
   9:	41 b3 00             	mov    r11b,0x0
   c:	41 b4 00             	mov    r12b,0x0
   f:	b3 00                	mov    bl,0x0
  11:	b1 00                	mov    cl,0x0
  13:	41 b0 00             	mov    r8b,0x0
  16:	41 b1 00             	mov    r9b,0x0
  19:	41 b2 00             	mov    r10b,0x0
  1c:	41 b3 00             	mov    r11b,0x0
  1f:	41 b4 00             	mov    r12b,0x0
  22:	b3 00                	mov    bl,0x0
  24:	b1 00                	mov    cl,0x0
  26:	41 b0 00             	mov    r8b,0x0
  29:	41 b1 00             	mov    r9b,0x0
  2c:	41 b2 00             	mov    r10b,0x0
  2f:	41 b3 00             	mov    r11b,0x0
  32:	41 b4 00             	mov    r12b,0x0
  35:	b3 00                	mov    bl,0x0
  37:	b1 00                	mov    cl,0x0
  39:	41 b0 00             	mov    r8b,0x0
  3c:	41 b1 00             	mov    r9b,0x0
  3f:	41 b2 00             	mov    r10b,0x0
  42:	41 b3 00             	mov    r11b,0x0
  45:	41 b4 00             	mov    r12b,0x0
  48:	b3 00                	mov    bl,0x0
  4a:	b1 00                	mov    cl,0x0
  4c:	41 b0 00             	mov    r8b,0x0
  4f:	41 b1 00             	mov    r9b,0x0
  52:	41 b2 00             	mov    r10b,0x0
  55:	41 b3 00             	mov    r11b,0x0
  58:	41 b4 00             	mov    r12b,0x0
  5b:	b3 00                	mov    bl,0x0
  5d:	b1 00                	mov    cl,0x0
  5f:	41 b0 00             	mov    r8b,0x0
  62:	41 b1 00             	mov    r9b,0x0
  65:	41 b2 00             	mov    r10b,0x0
  68:	41 b3 00             	mov    r11b,0x0
  6b:	41 b4 00             	mov    r12b,0x0
  6e:	b3 00                	mov    bl,0x0
  70:	b1 00                	mov    cl,0x0
  72:	41 b0 00             	mov    r8b,0x0
  75:	41 b1 00             	mov    r9b,0x0
  78:	41 b2 00             	mov    r10b,0x0
  7b:	41 b3 00             	mov    r11b,0x0
  7e:	41 b4 00             	mov    r12b,0x0
  81:	b3 00                	mov    bl,0x0
  83:	b1 00                	mov    cl,0x0
  85:	41 b0 00             	mov    r8b,0x0
  88:	41 b1 00             	mov    r9b,0x0
  8b:	41 b2 00             	mov    r10b,0x0
  8e:	41 b3 00             	mov    r11b,0x0
  91:	41 b4 00             	mov    r12b,0x0
  94:	b3 00                	mov    bl,0x0
  96:	b1 00                	mov    cl,0x0
  98:	41 b0 00             	mov    r8b,0x0
  9b:	41 b1 00             	mov    r9b,0x0
  9e:	41 b2 00             	mov    r10b,0x0
  a1:	41 b3 00             	mov    r11b,0x0
  a4:	41 b4 00             	mov    r12b,0x0
  a7:	b3 00                	mov    bl,0x0
  a9:	b1 00                	mov    cl,0x0
  ab:	41 b0 00             	mov    r8b,0x0
  ae:	41 b1 00             	mov    r9b,0x0
  b1:	41 b2 00             	mov    r10b,0x0
  b4:	41 b3 00             	mov    r11b,0x0
  b7:	41 b4 00             	mov    r12b,0x0
  ba:	b3 00                	mov    bl,0x0
  bc:	b1 00                	mov    cl,0x0
  be:	41 b0 00             	mov    r8b,0x0
  c1:	41 b1 00             	mov    r9b,0x0
  c4:	41 b2 00             	mov    r10b,0x0
  c7:	41 b3 00             	mov    r11b,0x0
  ca:	41 b4 00             	mov    r12b,0x0
  cd:	b3 00                	mov    bl,0x0
  cf:	b1 00                	mov    cl,0x0
  d1:	41 b0 00             	mov    r8b,0x0
  d4:	41 b1 00             	mov    r9b,0x0
  d7:	41 b2 00             	mov    r10b,0x0
  da:	41 b3 00             	mov    r11b,0x0
  dd:	41 b4 00             	mov    r12b,0x0
  e0:	b3 00                	mov    bl,0x0
  e2:	b1 00                	mov    cl,0x0
  e4:	41 b0 00             	mov    r8b,0x0
  e7:	41 b1 00             	mov    r9b,0x0
  ea:	41 b2 00             	mov    r10b,0x0
  ed:	41 b3 00             	mov    r11b,0x0
  f0:	41 b4 00             	mov    r12b,0x0
  f3:	b3 00                	mov    bl,0x0
  f5:	b1 00                	mov    cl,0x0
  f7:	41 b0 00             	mov    r8b,0x0
  fa:	41 b1 00             	mov    r9b,0x0
  fd:	41 b2 00             	mov    r10b,0x0
 100:	41 b3 00             	mov    r11b,0x0
 103:	41 b4 00             	mov    r12b,0x0
 106:	b3 00                	mov    bl,0x0
 108:	b1 00                	mov    cl,0x0
 10a:	41 b0 00             	mov    r8b,0x0
 10d:	41 b1 00             	mov    r9b,0x0
 110:	0f 31                	rdtsc

Show nanoBench command
Results:
- Instructions retired: 101.0
- Core cycles: 49.3
- Reference cycles: 50.43
- UOPS_PORT_5: 41.2
- UOPS_PORT_1: 40.1
- UOPS_PORT_0: 39.7

⇨ 10 μops that can only use ports {'0', '1', '5'}