PCMPEQB (XMM, M128) - Port Usage

With blocking instructions for ports {'1', '5'}:

Code:

   0:	0f 38 1c c1          	pabsb  mm0,mm1
   4:	0f 38 1c d1          	pabsb  mm2,mm1
   8:	0f 38 1c d9          	pabsb  mm3,mm1
   c:	0f 38 1c e1          	pabsb  mm4,mm1
  10:	0f 38 1c e9          	pabsb  mm5,mm1
  14:	0f 38 1c f1          	pabsb  mm6,mm1
  18:	0f 38 1c f9          	pabsb  mm7,mm1
  1c:	0f 38 1c c1          	pabsb  mm0,mm1
  20:	0f 38 1c d1          	pabsb  mm2,mm1
  24:	0f 38 1c d9          	pabsb  mm3,mm1
  28:	66 41 0f 74 06       	pcmpeqb xmm0,XMMWORD PTR [r14]

Init:

VZEROALL;
PXOR MM1, MM1;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.55
- Reference cycles: 5.61
- UOPS_PORT_5: 5.48
- UOPS_PORT_1: 5.5

⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'2', '3'}:

Code:

   0:	f2 41 0f f0 4e 40    	lddqu  xmm1,[r14+0x40]
   6:	f2 41 0f f0 56 50    	lddqu  xmm2,[r14+0x50]
   c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
  12:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
  18:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
  31:	00 00 
  33:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
  4c:	00 00 
  4e:	66 41 0f 74 06       	pcmpeqb xmm0,XMMWORD PTR [r14]

Init:
```
VZEROALL;
PXOR XMM0, XMM0
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.11
- Reference cycles: 6.23
- UOPS_PORT_2: 5.49
- UOPS_PORT_3: 5.49

⇨ One μop that can only use ports {'2', '3'}

With an indexed addressing mode

With blocking instructions for ports {'1', '5'}:

Code:

   0:	0f 38 1c c1          	pabsb  mm0,mm1
   4:	0f 38 1c d1          	pabsb  mm2,mm1
   8:	0f 38 1c d9          	pabsb  mm3,mm1
   c:	0f 38 1c e1          	pabsb  mm4,mm1
  10:	0f 38 1c e9          	pabsb  mm5,mm1
  14:	0f 38 1c f1          	pabsb  mm6,mm1
  18:	0f 38 1c f9          	pabsb  mm7,mm1
  1c:	0f 38 1c c1          	pabsb  mm0,mm1
  20:	0f 38 1c d1          	pabsb  mm2,mm1
  24:	0f 38 1c d9          	pabsb  mm3,mm1
  28:	66 43 0f 74 04 2e    	pcmpeqb xmm0,XMMWORD PTR [r14+r13*1]

Init:

VZEROALL;
PXOR MM1, MM1;
PXOR XMM0, XMM0;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.55
- Reference cycles: 5.67
- UOPS_PORT_5: 5.48
- UOPS_PORT_1: 5.5

⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'2', '3'}:

Code:

   0:	f2 41 0f f0 4e 40    	lddqu  xmm1,[r14+0x40]
   6:	f2 41 0f f0 56 50    	lddqu  xmm2,[r14+0x50]
   c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
  12:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
  18:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
  31:	00 00 
  33:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
  4c:	00 00 
  4e:	66 43 0f 74 04 2e    	pcmpeqb xmm0,XMMWORD PTR [r14+r13*1]

Init:
```
VZEROALL;
PXOR XMM0, XMM0;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.1
- Reference cycles: 6.12
- UOPS_PORT_2: 5.49
- UOPS_PORT_3: 5.49

⇨ One μop that can only use ports {'2', '3'}