VPADDD (YMM, YMM, M256) - Port Usage (IACA 3.0)


With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.50 Cycles       Throughput Bottleneck: Backend
Loop Count:  55
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.3     0.0  |  0.3  |  5.5     5.5  |  5.5     5.5  |  0.0  |  0.3  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   2^     | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | vpaddd ymm0, ymm1, ymmword ptr [r14]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}

With blocking instructions for ports {'0', '1', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 3.30 Cycles       Throughput Bottleneck: Backend
Loop Count:  23
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  3.6     0.0  |  3.6  |  0.5     0.5  |  0.5     0.5  |  0.0  |  3.7  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm2, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm4, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm5, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm6, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm7, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm8, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm9, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm10, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm11, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm12, xmm3
|   2^     | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | vpaddd ymm0, ymm1, ymmword ptr [r14]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'0', '1', '5'}

With an indexed addressing mode


With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.50 Cycles       Throughput Bottleneck: Backend
Loop Count:  55
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.3     0.0  |  0.3  |  5.5     5.5  |  5.5     5.5  |  0.0  |  0.3  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   2      | 0.3         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | vpaddd ymm0, ymm1, ymmword ptr [r14+r13*1]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}

With blocking instructions for ports {'0', '1', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 3.32 Cycles       Throughput Bottleneck: FrontEnd
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  3.7     0.0  |  3.6  |  0.5     0.5  |  0.5     0.5  |  0.0  |  3.7  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      | 0.3         | 0.3  |             |             |      | 0.4  |      |      | vmovq xmm2, xmm3
|   1      | 0.4         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm4, xmm3
|   1      | 0.3         | 0.4  |             |             |      | 0.3  |      |      | vmovq xmm5, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.4  |      |      | vmovq xmm6, xmm3
|   1      | 0.4         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm7, xmm3
|   1      | 0.3         | 0.4  |             |             |      | 0.3  |      |      | vmovq xmm8, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.4  |      |      | vmovq xmm9, xmm3
|   1      | 0.4         | 0.3  |             |             |      | 0.3  |      |      | vmovq xmm10, xmm3
|   1      | 0.3         | 0.4  |             |             |      | 0.3  |      |      | vmovq xmm11, xmm3
|   1      | 0.3         | 0.3  |             |             |      | 0.4  |      |      | vmovq xmm12, xmm3
|   2      | 0.4         | 0.3  | 0.5     0.5 | 0.5     0.5 |      | 0.3  |      |      | vpaddd ymm0, ymm1, ymmword ptr [r14+r13*1]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'0', '1', '5'}