VGATHERQPD (ZMM, K, VSIB_ZMM) - Port Usage (IACA 3.0)
With blocking instructions for port '0':
Throughput Analysis Report
--------------------------
Block Throughput: 37.00 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 37.0 0.0 | 0.0 | 4.0 4.0 | 4.0 4.0 | 0.0 | 1.0 | 1.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd edx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd edx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd edx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd edx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 5^ | 1.0 | | 4.0 4.0 | 4.0 4.0 | | 1.0 | 1.0 | | vgatherqpd zmm0, k1, zmmword ptr [r14+zmm14*1]
Total Num Of Uops: 41
⇨ One μop that can only use port '0'
With blocking instructions for port '5':
Throughput Analysis Report
--------------------------
Block Throughput: 36.00 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 0.0 | 4.0 4.0 | 4.0 4.0 | 0.0 | 36.0 | 1.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | movd mmx0, r8d
| 1 | | | | | | 1.0 | | | movd mmx1, r8d
| 1 | | | | | | 1.0 | | | movd mmx2, r8d
| 1 | | | | | | 1.0 | | | movd mmx3, r8d
| 1 | | | | | | 1.0 | | | movd mmx4, r8d
| 1 | | | | | | 1.0 | | | movd mmx5, r8d
| 1 | | | | | | 1.0 | | | movd mmx6, r8d
| 1 | | | | | | 1.0 | | | movd mmx7, r8d
| 1 | | | | | | 1.0 | | | movd mmx0, r8d
| 1 | | | | | | 1.0 | | | movd mmx1, r8d
| 1 | | | | | | 1.0 | | | movd mmx2, r8d
| 1 | | | | | | 1.0 | | | movd mmx3, r8d
| 1 | | | | | | 1.0 | | | movd mmx4, r8d
| 1 | | | | | | 1.0 | | | movd mmx5, r8d
| 1 | | | | | | 1.0 | | | movd mmx6, r8d
| 1 | | | | | | 1.0 | | | movd mmx7, r8d
| 1 | | | | | | 1.0 | | | movd mmx0, r8d
| 1 | | | | | | 1.0 | | | movd mmx1, r8d
| 1 | | | | | | 1.0 | | | movd mmx2, r8d
| 1 | | | | | | 1.0 | | | movd mmx3, r8d
| 1 | | | | | | 1.0 | | | movd mmx4, r8d
| 1 | | | | | | 1.0 | | | movd mmx5, r8d
| 1 | | | | | | 1.0 | | | movd mmx6, r8d
| 1 | | | | | | 1.0 | | | movd mmx7, r8d
| 1 | | | | | | 1.0 | | | movd mmx0, r8d
| 1 | | | | | | 1.0 | | | movd mmx1, r8d
| 1 | | | | | | 1.0 | | | movd mmx2, r8d
| 1 | | | | | | 1.0 | | | movd mmx3, r8d
| 1 | | | | | | 1.0 | | | movd mmx4, r8d
| 1 | | | | | | 1.0 | | | movd mmx5, r8d
| 1 | | | | | | 1.0 | | | movd mmx6, r8d
| 1 | | | | | | 1.0 | | | movd mmx7, r8d
| 1 | | | | | | 1.0 | | | movd mmx0, r8d
| 1 | | | | | | 1.0 | | | movd mmx1, r8d
| 1 | | | | | | 1.0 | | | movd mmx2, r8d
| 1 | | | | | | 1.0 | | | movd mmx3, r8d
| 5^ | 2.0 | | 4.0 4.0 | 4.0 4.0 | | | 1.0 | | vgatherqpd zmm0, k1, zmmword ptr [r14+zmm14*1]
Total Num Of Uops: 41
With blocking instructions for ports {'0', '5'}:
Throughput Analysis Report
--------------------------
Block Throughput: 37.00 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 37.0 0.0 | 0.0 | 4.0 4.0 | 4.0 4.0 | 0.0 | 37.0 | 1.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 5^ | 1.0 | | 4.0 4.0 | 4.0 4.0 | | 1.0 | 1.0 | | vgatherqpd zmm0, k1, zmmword ptr [r14+zmm14*1]
Total Num Of Uops: 77
⇨ One μop that can only use ports {'0', '5'}
With blocking instructions for ports {'0', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 36.47 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 36.5 0.0 | 0.0 | 4.0 4.0 | 4.0 4.0 | 0.0 | 2.0 | 36.5 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | | | | | | 1.0 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r11d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r12d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ebx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx ecx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx edx, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r8d, r9d, 0x2
| 1 | 0.5 | | | | | | 0.5 | | rorx r10d, r9d, 0x2
| 5^ | 1.0 | | 4.0 4.0 | 4.0 4.0 | | 2.0 | | | vgatherqpd zmm0, k1, zmmword ptr [r14+zmm14*1]
Total Num Of Uops: 77
With blocking instructions for ports {'1', '5'}:
Throughput Analysis Report
--------------------------
Block Throughput: 36.00 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 36.0 | 4.0 4.0 | 4.0 4.0 | 0.0 | 36.0 | 1.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea bx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea cx, ptr [r14]
| 1 | | | | | | 1.0 | | | lea dx, ptr [r14]
| 5^ | 2.0 | | 4.0 4.0 | 4.0 4.0 | | | 1.0 | | vgatherqpd zmm0, k1, zmmword ptr [r14+zmm14*1]
Total Num Of Uops: 77
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 40.00 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 1.0 0.0 | 0.0 | 40.0 40.0 | 40.0 40.0 | 0.0 | 1.0 | 1.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 1 | | | 1.0 1.0 | | | | | | mov bh, byte ptr [rdi+0x40]
| 1 | | | | 1.0 1.0 | | | | | mov ch, byte ptr [rdi+0x41]
| 1 | | | 1.0 1.0 | | | | | | mov dh, byte ptr [rdi+0x42]
| 1 | | | | 1.0 1.0 | | | | | mov ah, byte ptr [rdi+0x43]
| 5^ | 1.0 | | 4.0 4.0 | 4.0 4.0 | | 1.0 | 1.0 | | vgatherqpd zmm0, k1, zmmword ptr [r14+zmm14*1]
Total Num Of Uops: 77
⇨ 8 μops that can only use ports {'2', '3'}
With blocking instructions for ports {'0', '1', '5', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 28.00 Cycles Throughput Bottleneck: FrontEnd (Bubbles)
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 25.7 0.0 | 25.8 | 4.0 4.0 | 4.0 4.0 | 0.0 | 25.7 | 25.7 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 1 | 0.3 | 0.2 | | | | 0.3 | 0.3 | | mov bh, 0x0
| 1 | 0.3 | 0.3 | | | | 0.2 | 0.3 | | mov ch, 0x0
| 1 | 0.3 | 0.3 | | | | 0.3 | 0.2 | | mov dh, 0x0
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.3 | | mov ah, 0x0
| 5^ | 1.0 | | 4.0 4.0 | 4.0 4.0 | | 1.0 | 1.0 | | vgatherqpd zmm0, k1, zmmword ptr [r14+zmm14*1]
Total Num Of Uops: 105
⇨ One μop that can only use ports {'0', '1', '5', '6'}