INC_LOCK (M32) - Port Usage (IACA 2.3)


With blocking instructions for port '0':

Throughput Analysis Report
--------------------------
Block Throughput: 10.00 Cycles       Throughput Bottleneck: Backend. Port0

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 10.0   0.0  | 1.5  | 0.6    0.5  | 0.7    0.5  | 1.0  | 1.5  | 2.0  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm0, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm2, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm3, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm4, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm5, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm6, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm7, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm8, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm9, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm10, xmm1
|   8^   |           | 1.5 | 0.6   0.5 | 0.7   0.5 | 1.0 | 1.5 | 2.0 | 0.6 |    | lock inc dword ptr [r14]
Total Num Of Uops: 18

With blocking instructions for port '1':

Throughput Analysis Report
--------------------------
Block Throughput: 10.00 Cycles       Throughput Bottleneck: Backend. Port1

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.6    0.0  | 10.0 | 0.6    0.5  | 0.7    0.5  | 1.0  | 1.6  | 1.7  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r8w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r10w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r11w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r12w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul bx, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul cx, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul dx, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r8w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r10w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r11w, r9w
|   8^   | 1.6       |     | 0.6   0.5 | 0.7   0.5 | 1.0 | 1.6 | 1.7 | 0.6 |    | lock inc dword ptr [r14]
Total Num Of Uops: 18

With blocking instructions for port '4':

Throughput Analysis Report
--------------------------
Block Throughput: 11.00 Cycles       Throughput Bottleneck: Backend. Port4

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.2    0.0  | 1.2  | 4.0    0.5  | 4.0    0.5  | 11.0 | 1.2  | 1.2  | 4.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   2^   |           |     |           |           | 1.0 |     |     | 1.0 | CP | mov qword ptr [r14+0x40], r8
|   2^   |           |     | 1.0       |           | 1.0 |     |     |     | CP | mov qword ptr [r14+0x48], r8
|   2^   |           |     |           | 1.0       | 1.0 |     |     |     | CP | mov qword ptr [r14+0x50], r8
|   2^   |           |     |           |           | 1.0 |     |     | 1.0 | CP | mov qword ptr [r14+0x58], r8
|   2^   |           |     | 1.0       |           | 1.0 |     |     |     | CP | mov qword ptr [r14+0x60], r8
|   2^   |           |     |           | 1.0       | 1.0 |     |     |     | CP | mov qword ptr [r14+0x68], r8
|   2^   |           |     |           |           | 1.0 |     |     | 1.0 | CP | mov qword ptr [r14+0x70], r8
|   2^   |           |     | 1.0       |           | 1.0 |     |     |     | CP | mov qword ptr [r14+0x78], r8
|   2^   |           |     |           | 1.0       | 1.0 |     |     |     | CP | mov qword ptr [r14+0x80], r8
|   2^   |           |     |           |           | 1.0 |     |     | 1.0 | CP | mov qword ptr [r14+0x88], r8
|   8^   | 1.2       | 1.2 | 1.0   0.5 | 1.0   0.5 | 1.0 | 1.2 | 1.2 |     | CP | lock inc dword ptr [r14]
Total Num Of Uops: 28
⇨ One μop that can only use port '4'

With blocking instructions for port '5':

Throughput Analysis Report
--------------------------
Block Throughput: 10.00 Cycles       Throughput Bottleneck: Backend. Port5

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.6    0.0  | 1.6  | 0.6    0.5  | 0.7    0.5  | 1.0  | 10.0 | 1.7  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm0, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm2, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm3, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm4, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm5, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm6, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm7, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm8, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm9, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm10, xmm1, 0x2
|   8^   | 1.6       | 1.6 | 0.6   0.5 | 0.7   0.5 | 1.0 |     | 1.7 | 0.6 |    | lock inc dword ptr [r14]
Total Num Of Uops: 18

With blocking instructions for ports {'0', '1'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: Backend. Port0, Port1

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 8.0    0.0  | 8.0  | 0.6    0.5  | 0.7    0.5  | 1.0  | 2.5  | 2.5  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm0, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm2, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm3, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm4, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm5, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm6, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm7, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm8, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm9, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm10, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm11, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm12, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm0, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm2, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm3, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm4, xmm1
|   8^   |           |     | 0.6   0.5 | 0.7   0.5 | 1.0 | 2.5 | 2.5 | 0.6 |    | lock inc dword ptr [r14]
Total Num Of Uops: 24

With blocking instructions for ports {'0', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: Backend. Port0, Port5

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 8.0    0.0  | 2.5  | 0.6    0.5  | 0.7    0.5  | 1.0  | 8.0  | 2.5  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx0, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx2, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx3, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx4, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx5, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx6, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx7, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx0, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx2, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx3, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx4, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx5, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx6, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx7, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx0, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx2, mmx1
|   8^   |           | 2.5 | 0.6   0.5 | 0.7   0.5 | 1.0 |     | 2.5 | 0.6 |    | lock inc dword ptr [r14]
Total Num Of Uops: 24

With blocking instructions for ports {'0', '6'}:

Throughput Analysis Report
--------------------------
Block Throughput: 9.00 Cycles       Throughput Bottleneck: Backend. Port0, Port6

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 9.0    0.0  | 1.5  | 0.6    0.5  | 0.7    0.5  | 1.0  | 1.5  | 9.0  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r8w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar r9w, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r10w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar r11w, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r12w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar bx, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar cx, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar dx, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r8w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar r9w, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r10w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar r11w, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r12w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar bx, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar cx, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar dx, 0x0
|   8^   | 1.0       | 1.5 | 0.6   0.5 | 0.7   0.5 | 1.0 | 1.5 | 1.0 | 0.6 | CP | lock inc dword ptr [r14]
Total Num Of Uops: 24
⇨ 2 μops that can only use ports {'0', '6'}

With blocking instructions for ports {'1', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: Backend. Port1, Port5

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 2.5    0.0  | 8.0  | 0.6    0.5  | 0.7    0.5  | 1.0  | 8.0  | 2.5  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r8w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea r9w, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r10w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea r11w, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r12w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea bx, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea cx, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea dx, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r8w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea r9w, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r10w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea r11w, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r12w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea bx, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea cx, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea dx, ptr [r14]
|   8^   | 2.5       |     | 0.6   0.5 | 0.7   0.5 | 1.0 |     | 2.5 | 0.6 |    | lock inc dword ptr [r14]
Total Num Of Uops: 24

With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.50 Cycles       Throughput Bottleneck: Backend. PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.2    0.0  | 1.2  | 8.5    8.5  | 8.5    8.5  | 1.0  | 1.2  | 1.4  | 1.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm0, xmmword ptr [r14+0x40]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm1, xmmword ptr [r14+0x50]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm2, xmmword ptr [r14+0x60]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm3, xmmword ptr [r14+0x70]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm4, xmmword ptr [r14+0x80]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm5, xmmword ptr [r14+0x90]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm12, xmmword ptr [r14+0x100]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm0, xmmword ptr [r14+0x40]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm1, xmmword ptr [r14+0x50]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm2, xmmword ptr [r14+0x60]
|   8^   | 1.2       | 1.2 | 0.5   0.5 | 0.5   0.5 | 1.0 | 1.2 | 1.4 | 1.0 | CP | lock inc dword ptr [r14]
Total Num Of Uops: 24
⇨ One μop that can only use ports {'2', '3'}

With blocking instructions for ports {'0', '1', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 8.0    0.0  | 8.0  | 0.6    0.5  | 0.7    0.5  | 1.0  | 8.0  | 5.0  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm0, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm2, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm3, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm4, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm5, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm6, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm7, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm8, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm9, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm10, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm11, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm12, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm0, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm2, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm3, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm4, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm5, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm6, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm7, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm8, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm9, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm10, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm11, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm12, xmm1
|   8^   |           |     | 0.6   0.5 | 0.7   0.5 | 1.0 |     | 5.0 | 0.6 |    | lock inc dword ptr [r14]
Total Num Of Uops: 32

With blocking instructions for ports {'2', '3', '7'}:

Throughput Analysis Report
--------------------------
Block Throughput: 25.00 Cycles       Throughput Bottleneck: Backend. Port4

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.2    0.0  | 1.2  | 8.6    0.5  | 8.7    0.5  | 25.0 | 1.2  | 1.2  | 8.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   2^   |           |     | 0.3       | 0.2       | 1.0 |     |     | 0.4 | CP | mov qword ptr [r14+0x40], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x48], r8
|   2^   |           |     | 0.3       | 0.4       | 1.0 |     |     | 0.2 | CP | mov qword ptr [r14+0x50], r8
|   2^   |           |     | 0.3       | 0.2       | 1.0 |     |     | 0.4 | CP | mov qword ptr [r14+0x58], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x60], r8
|   2^   |           |     | 0.3       | 0.4       | 1.0 |     |     | 0.2 | CP | mov qword ptr [r14+0x68], r8
|   2^   |           |     | 0.3       | 0.2       | 1.0 |     |     | 0.4 | CP | mov qword ptr [r14+0x70], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x78], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x80], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x88], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x90], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x98], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0xa0], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0xa8], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0xb0], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0xb8], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x40], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x48], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x50], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x58], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x60], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x68], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x70], r8
|   2^   |           |     | 0.3       | 0.3       | 1.0 |     |     | 0.3 | CP | mov qword ptr [r14+0x78], r8
|   8^   | 1.2       | 1.2 | 0.6   0.5 | 0.9   0.5 | 1.0 | 1.2 | 1.2 | 0.5 | CP | lock inc dword ptr [r14]
Total Num Of Uops: 56
⇨ One μop that can only use ports {'2', '3', '7'}

With blocking instructions for ports {'0', '1', '5', '6'}:

Throughput Analysis Report
--------------------------
Block Throughput: 9.48 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 9.2    0.0  | 9.2  | 0.6    0.5  | 0.7    0.5  | 1.0  | 9.2  | 9.2  | 0.6  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.4       | 0.2 |           |           |     | 0.3 |     |     | CP | mov r8w, 0x100
|   1    |           | 0.5 |           |           |     | 0.2 | 0.2 |     | CP | mov r9w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov r10w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov r11w, 0x100
|   1    | 0.3       |     |           |           |     | 0.2 | 0.4 |     | CP | mov r12w, 0x100
|   1    | 0.2       | 0.5 |           |           |     | 0.2 | 0.1 |     | CP | mov bx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov cx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov dx, 0x100
|   1    | 0.3       |     |           |           |     | 0.2 | 0.4 |     | CP | mov r8w, 0x100
|   1    | 0.2       | 0.5 |           |           |     | 0.2 | 0.1 |     | CP | mov r9w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov r10w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov r11w, 0x100
|   1    | 0.3       |     |           |           |     | 0.2 | 0.4 |     | CP | mov r12w, 0x100
|   1    | 0.2       | 0.5 |           |           |     | 0.2 | 0.1 |     | CP | mov bx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov cx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov dx, 0x100
|   1    | 0.3       |     |           |           |     | 0.2 | 0.4 |     | CP | mov r8w, 0x100
|   1    | 0.2       | 0.5 |           |           |     | 0.2 | 0.1 |     | CP | mov r9w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov r10w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov r11w, 0x100
|   1    | 0.3       |     |           |           |     | 0.2 | 0.4 |     | CP | mov r12w, 0x100
|   1    | 0.2       | 0.5 |           |           |     | 0.2 | 0.1 |     | CP | mov bx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov cx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov dx, 0x100
|   1    | 0.3       |     |           |           |     | 0.2 | 0.4 |     | CP | mov r8w, 0x100
|   1    | 0.2       | 0.5 |           |           |     | 0.2 | 0.1 |     | CP | mov r9w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov r10w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov r11w, 0x100
|   1    | 0.3       |     |           |           |     | 0.2 | 0.4 |     | CP | mov r12w, 0x100
|   1    | 0.2       | 0.5 |           |           |     | 0.2 | 0.1 |     | CP | mov bx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov cx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     | CP | mov dx, 0x100
|   8^   | 1.4       | 1.0 | 0.6   0.5 | 0.7   0.5 | 1.0 | 1.1 | 1.5 | 0.6 | CP | lock inc dword ptr [r14]
Total Num Of Uops: 40
⇨ 3 μops that can only use ports {'0', '1', '5', '6'}

With an indexed addressing mode


With blocking instructions for port '0':

Throughput Analysis Report
--------------------------
Block Throughput: 10.00 Cycles       Throughput Bottleneck: Backend. Port0

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 10.0   0.0  | 1.5  | 1.0    0.5  | 1.0    0.5  | 1.0  | 1.5  | 2.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm0, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm2, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm3, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm4, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm5, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm6, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm7, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm8, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm9, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | aesdec xmm10, xmm1
|   8    |           | 1.5 | 1.0   0.5 | 1.0   0.5 | 1.0 | 1.5 | 2.0 |     |    | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 18

With blocking instructions for port '1':

Throughput Analysis Report
--------------------------
Block Throughput: 10.00 Cycles       Throughput Bottleneck: Backend. Port1

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.6    0.0  | 10.0 | 1.0    0.5  | 1.0    0.5  | 1.0  | 1.6  | 1.7  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r8w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r10w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r11w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r12w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul bx, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul cx, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul dx, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r8w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r10w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | imul r11w, r9w
|   8    | 1.6       |     | 1.0   0.5 | 1.0   0.5 | 1.0 | 1.6 | 1.7 |     |    | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 18

With blocking instructions for port '4':

Throughput Analysis Report
--------------------------
Block Throughput: 11.00 Cycles       Throughput Bottleneck: Backend. Port4

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.2    0.0  | 1.2  | 4.0    0.5  | 4.0    0.5  | 11.0 | 1.2  | 1.2  | 4.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   2^   |           |     |           |           | 1.0 |     |     | 1.0 | CP | mov qword ptr [r14+0x40], r8
|   2^   |           |     | 1.0       |           | 1.0 |     |     |     | CP | mov qword ptr [r14+0x48], r8
|   2^   |           |     |           | 1.0       | 1.0 |     |     |     | CP | mov qword ptr [r14+0x50], r8
|   2^   |           |     |           |           | 1.0 |     |     | 1.0 | CP | mov qword ptr [r14+0x58], r8
|   2^   |           |     | 0.6       | 0.3       | 1.0 |     |     |     | CP | mov qword ptr [r14+0x60], r8
|   2^   |           |     | 0.3       | 0.6       | 1.0 |     |     |     | CP | mov qword ptr [r14+0x68], r8
|   2^   |           |     |           |           | 1.0 |     |     | 1.0 | CP | mov qword ptr [r14+0x70], r8
|   2^   |           |     | 1.0       |           | 1.0 |     |     |     | CP | mov qword ptr [r14+0x78], r8
|   2^   |           |     |           | 1.0       | 1.0 |     |     |     | CP | mov qword ptr [r14+0x80], r8
|   2^   |           |     |           |           | 1.0 |     |     | 1.0 | CP | mov qword ptr [r14+0x88], r8
|   8    | 1.2       | 1.2 | 1.0   0.5 | 1.0   0.5 | 1.0 | 1.2 | 1.2 |     | CP | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 28
⇨ One μop that can only use port '4'

With blocking instructions for port '5':

Throughput Analysis Report
--------------------------
Block Throughput: 10.00 Cycles       Throughput Bottleneck: Backend. Port5

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.6    0.0  | 1.6  | 1.0    0.5  | 1.0    0.5  | 1.0  | 10.0 | 1.7  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm0, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm2, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm3, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm4, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm5, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm6, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm7, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm8, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm9, xmm1, 0x2
|   1    |           |     |           |           |     | 1.0 |     |     | CP | insertps xmm10, xmm1, 0x2
|   8    | 1.6       | 1.6 | 1.0   0.5 | 1.0   0.5 | 1.0 |     | 1.7 |     |    | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 18

With blocking instructions for ports {'0', '1'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: Backend. Port0, Port1

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 8.0    0.0  | 8.0  | 1.0    0.5  | 1.0    0.5  | 1.0  | 2.5  | 2.5  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm0, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm2, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm3, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm4, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm5, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm6, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm7, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm8, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm9, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm10, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm11, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm12, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm0, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm2, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | addpd xmm3, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | addpd xmm4, xmm1
|   8    |           |     | 1.0   0.5 | 1.0   0.5 | 1.0 | 2.5 | 2.5 |     |    | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 24

With blocking instructions for ports {'0', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: Backend. Port0, Port5

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 8.0    0.0  | 2.5  | 1.0    0.5  | 1.0    0.5  | 1.0  | 8.0  | 2.5  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx0, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx2, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx3, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx4, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx5, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx6, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx7, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx0, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx2, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx3, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx4, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx5, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx6, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx7, mmx1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | movq mmx0, mmx1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | movq mmx2, mmx1
|   8    |           | 2.5 | 1.0   0.5 | 1.0   0.5 | 1.0 |     | 2.5 |     |    | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 24

With blocking instructions for ports {'0', '6'}:

Throughput Analysis Report
--------------------------
Block Throughput: 9.00 Cycles       Throughput Bottleneck: Backend. Port0, Port6

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 9.0    0.0  | 1.5  | 1.0    0.5  | 1.0    0.5  | 1.0  | 1.5  | 9.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r8w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar r9w, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r10w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar r11w, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r12w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar bx, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar cx, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar dx, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r8w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar r9w, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r10w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar r11w, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar r12w, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar bx, 0x0
|   1    | 1.0       |     |           |           |     |     |     |     | CP | sar cx, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     | CP | sar dx, 0x0
|   8    | 1.0       | 1.5 | 1.0   0.5 | 1.0   0.5 | 1.0 | 1.5 | 1.0 |     | CP | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 24
⇨ 2 μops that can only use ports {'0', '6'}

With blocking instructions for ports {'1', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: Backend. Port1, Port5

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 2.5    0.0  | 8.0  | 1.0    0.5  | 1.0    0.5  | 1.0  | 8.0  | 2.5  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r8w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea r9w, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r10w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea r11w, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r12w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea bx, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea cx, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea dx, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r8w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea r9w, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r10w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea r11w, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea r12w, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea bx, ptr [r14]
|   1    |           | 1.0 |           |           |     |     |     |     | CP | lea cx, ptr [r14]
|   1    |           |     |           |           |     | 1.0 |     |     | CP | lea dx, ptr [r14]
|   8    | 2.5       |     | 1.0   0.5 | 1.0   0.5 | 1.0 |     | 2.5 |     |    | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 24

With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 9.00 Cycles       Throughput Bottleneck: Backend. PORT2_AGU, PORT3_AGU

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 1.2    0.0  | 1.2  | 9.0    8.5  | 9.0    8.5  | 1.0  | 1.2  | 1.4  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm0, xmmword ptr [r14+0x40]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm1, xmmword ptr [r14+0x50]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm2, xmmword ptr [r14+0x60]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm3, xmmword ptr [r14+0x70]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm4, xmmword ptr [r14+0x80]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm5, xmmword ptr [r14+0x90]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm12, xmmword ptr [r14+0x100]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm0, xmmword ptr [r14+0x40]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm1, xmmword ptr [r14+0x50]
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     | CP | lddqu xmm2, xmmword ptr [r14+0x60]
|   8    | 1.2       | 1.2 | 1.0   0.5 | 1.0   0.5 | 1.0 | 1.2 | 1.4 |     | CP | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 24
⇨ 2 μops that can only use ports {'2', '3'}

With blocking instructions for ports {'0', '1', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 8.00 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 8.0    0.0  | 8.0  | 1.0    0.5  | 1.0    0.5  | 1.0  | 8.0  | 5.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm0, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm2, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm3, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm4, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm5, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm6, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm7, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm8, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm9, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm10, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm11, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm12, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm0, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm2, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm3, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm4, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm5, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm6, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm7, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm8, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm9, xmm1
|   1    | 1.0       |     |           |           |     |     |     |     | CP | andnpd xmm10, xmm1
|   1    |           | 1.0 |           |           |     |     |     |     | CP | andnpd xmm11, xmm1
|   1    |           |     |           |           |     | 1.0 |     |     | CP | andnpd xmm12, xmm1
|   8    |           |     | 1.0   0.5 | 1.0   0.5 | 1.0 |     | 5.0 |     |    | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 32

With blocking instructions for ports {'0', '1', '5', '6'}:

Throughput Analysis Report
--------------------------
Block Throughput: 10.00 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 9.2    0.0  | 9.2  | 1.0    0.5  | 1.0    0.5  | 1.0  | 9.2  | 9.2  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.2       | 0.5 |           |           |     | 0.2 |     |     |    | mov r8w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.5 |     |     |    | mov r9w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r10w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r11w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r12w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov bx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov cx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov dx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r8w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r9w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r10w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r11w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r12w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov bx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov cx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov dx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r8w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r9w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r10w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r11w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r12w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov bx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov cx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov dx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r8w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r9w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r10w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r11w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov r12w, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov bx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov cx, 0x100
|   1    | 0.2       | 0.2 |           |           |     | 0.2 | 0.2 |     |    | mov dx, 0x100
|   8    | 1.2       | 1.0 | 1.0   0.5 | 1.0   0.5 | 1.0 | 1.0 | 1.8 |     |    | lock inc dword ptr [r14+r13*1]
Total Num Of Uops: 40
⇨ 3 μops that can only use ports {'0', '1', '5', '6'}