IMUL (M32) - Port Usage (IACA 2.3)
With blocking instructions for port '1':
Throughput Analysis Report
--------------------------
Block Throughput: 11.00 Cycles Throughput Bottleneck: Backend. Port1
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 11.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | CP | imul r8w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r10w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r11w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r12w, r9w
| 1 | | 1.0 | | | | | | | CP | imul bx, r9w
| 1 | | 1.0 | | | | | | | CP | imul cx, r9w
| 1 | | 1.0 | | | | | | | CP | imul r8w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r10w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r11w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r12w, r9w
| 2^ | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | CP | imul dword ptr [r14]
Total Num Of Uops: 12
⇨ One μop that can only use port '1'
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 5.50 Cycles Throughput Bottleneck: Backend. PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 5.5 5.5 | 5.5 5.5 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 2^ | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | CP | imul dword ptr [r14]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}
With an indexed addressing mode
With blocking instructions for port '1':
Throughput Analysis Report
--------------------------
Block Throughput: 11.00 Cycles Throughput Bottleneck: Backend. Port1
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 11.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | CP | imul r8w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r10w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r11w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r12w, r9w
| 1 | | 1.0 | | | | | | | CP | imul bx, r9w
| 1 | | 1.0 | | | | | | | CP | imul cx, r9w
| 1 | | 1.0 | | | | | | | CP | imul r8w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r10w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r11w, r9w
| 1 | | 1.0 | | | | | | | CP | imul r12w, r9w
| 2 | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | CP | imul dword ptr [r14+r13*1]
Total Num Of Uops: 12
⇨ One μop that can only use port '1'
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 5.50 Cycles Throughput Bottleneck: Backend. PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 5.5 5.5 | 5.5 5.5 | 0.0 | 0.0 | 0.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 2 | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | CP | imul dword ptr [r14+r13*1]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}