IDIV (R64) - Port Usage (IACA 3.0)
With blocking instructions for port '0':
Throughput Analysis Report
--------------------------
Block Throughput: 103.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 104.0 0.0 | 20.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 20.0 | 22.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | movd r11d, mmx0
| 66 | 4.0 | 20.0 | | | | 20.0 | 22.0 | | idiv rbx
Total Num Of Uops: 166
⇨ 4 μops that can only use port '0'
With blocking instructions for port '1':
Throughput Analysis Report
--------------------------
Block Throughput: 101.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 21.3 0.0 | 102.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 21.3 | 21.4 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r8w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r10w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r11w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul r12w, r9w, 0x0
| 1 | | 1.0 | | | | | | | imul cx, r9w, 0x0
| 66 | 21.3 | 2.0 | | | | 21.3 | 21.4 | | idiv rbx
Total Num Of Uops: 166
⇨ 2 μops that can only use port '1'
With blocking instructions for port '5':
Throughput Analysis Report
--------------------------
Block Throughput: 103.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 20.7 0.0 | 20.7 | 0.0 0.0 | 0.0 0.0 | 0.0 | 104.0 | 20.6 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm5, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm6, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm7, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm8, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm9, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm10, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm11, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm12, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm5, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm6, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm7, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm8, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm9, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm10, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm11, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm12, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm5, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm6, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm7, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm8, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm9, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm10, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm11, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm12, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm5, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm6, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm7, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm8, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm9, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm10, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm11, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm12, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm5, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm6, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm7, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm8, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm9, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm10, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm11, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm12, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm5, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm6, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm7, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm8, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm9, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm10, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm11, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm12, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm5, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm6, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm7, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm8, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm9, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm10, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm11, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm12, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm5, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm6, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm7, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm8, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm9, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm10, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm11, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm12, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm0, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm2, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm3, xmm1, 0x2
| 1 | | | | | | 1.0 | | | insertps xmm4, xmm1, 0x2
| 66 | 20.7 | 20.7 | | | | 4.0 | 20.6 | | idiv rbx
Total Num Of Uops: 166
⇨ 4 μops that can only use port '5'
With blocking instructions for ports {'0', '1'}:
Throughput Analysis Report
--------------------------
Block Throughput: 101.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 53.0 0.0 | 53.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 30.0 | 30.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm5, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm6, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm7, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm8, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm9, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm10, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm11, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm12, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm5, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm6, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm7, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm8, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm9, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm10, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm11, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm12, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm5, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm6, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm7, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm8, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm9, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm10, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm11, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm12, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm5, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm6, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm7, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm8, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm9, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm10, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm11, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm12, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm5, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm6, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm7, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm8, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm9, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm10, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm11, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm12, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm5, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm6, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm7, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm8, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm9, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm10, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm11, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm12, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm5, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm6, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm7, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm8, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm9, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm10, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm11, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm12, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm5, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm6, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm7, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm8, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm9, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm10, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm11, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm12, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm0, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm2, xmm1
| 1 | 1.0 | | | | | | | | pabsb xmm3, xmm1
| 1 | | 1.0 | | | | | | | pabsb xmm4, xmm1
| 66 | 4.0 | 2.0 | | | | 30.0 | 30.0 | | idiv rbx
Total Num Of Uops: 166
With blocking instructions for ports {'0', '5'}:
Throughput Analysis Report
--------------------------
Block Throughput: 101.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 54.0 0.0 | 29.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 54.0 | 29.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 1 | 1.0 | | | | | | | | movq mmx3, mmx1
| 1 | | | | | | 1.0 | | | movq mmx4, mmx1
| 1 | 1.0 | | | | | | | | movq mmx5, mmx1
| 1 | | | | | | 1.0 | | | movq mmx6, mmx1
| 1 | 1.0 | | | | | | | | movq mmx7, mmx1
| 1 | | | | | | 1.0 | | | movq mmx0, mmx1
| 1 | 1.0 | | | | | | | | movq mmx2, mmx1
| 1 | | | | | | 1.0 | | | movq mmx3, mmx1
| 1 | 1.0 | | | | | | | | movq mmx4, mmx1
| 1 | | | | | | 1.0 | | | movq mmx5, mmx1
| 1 | 1.0 | | | | | | | | movq mmx6, mmx1
| 1 | | | | | | 1.0 | | | movq mmx7, mmx1
| 1 | 1.0 | | | | | | | | movq mmx0, mmx1
| 1 | | | | | | 1.0 | | | movq mmx2, mmx1
| 66 | 4.0 | 29.0 | | | | 4.0 | 29.0 | | idiv rbx
Total Num Of Uops: 166
With blocking instructions for ports {'0', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 101.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 63.0 0.0 | 20.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 20.0 | 63.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 1 | 1.0 | | | | | | | | sar r12b, 0x0
| 1 | | | | | | | 1.0 | | sar r12b, 0x0
| 66 | 13.0 | 20.0 | | | | 20.0 | 13.0 | | idiv rbx
Total Num Of Uops: 166
⇨ 22 μops that can only use ports {'0', '6'}
With blocking instructions for ports {'1', '5'}:
Throughput Analysis Report
--------------------------
Block Throughput: 101.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 30.0 0.0 | 53.0 | 0.0 0.0 | 0.0 0.0 | 0.0 | 53.0 | 30.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r12w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea cx, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r8w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r9w, ptr [r14]
| 1 | | 1.0 | | | | | | | lea r10w, ptr [r14]
| 1 | | | | | | 1.0 | | | lea r11w, ptr [r14]
| 66 | 30.0 | 2.0 | | | | 4.0 | 30.0 | | idiv rbx
Total Num Of Uops: 166
With blocking instructions for ports {'0', '1', '5'}:
Throughput Analysis Report
--------------------------
Block Throughput: 101.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 41.5 0.0 | 41.5 | 0.0 0.0 | 0.0 0.0 | 0.0 | 41.5 | 41.5 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | andnpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | andnpd xmm2, xmm1
| 1 | | | | | | 1.0 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm5, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm6, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm7, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm8, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm9, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm10, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm11, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm12, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm0, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm2, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm5, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm6, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm7, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm8, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm9, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm10, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm11, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm12, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm0, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm2, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm5, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm6, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm7, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm8, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm9, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm10, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm11, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm12, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm0, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm2, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm5, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm6, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm7, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm8, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm9, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm10, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm11, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm12, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm0, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm2, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm5, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm6, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm7, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm8, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm9, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm10, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm11, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm12, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm0, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm2, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm5, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm6, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm7, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm8, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm9, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm10, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm11, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm12, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm0, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm2, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm5, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm6, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm7, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm8, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm9, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm10, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm11, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm12, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm0, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm2, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm5, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm6, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm7, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm8, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm9, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm10, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm11, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm12, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm0, xmm1
| 1 | | 0.5 | | | | 0.5 | | | andnpd xmm2, xmm1
| 1 | 0.5 | | | | | 0.5 | | | andnpd xmm3, xmm1
| 1 | 0.5 | 0.5 | | | | | | | andnpd xmm4, xmm1
| 66 | 9.0 | 8.0 | | | | 7.5 | 41.5 | | idiv rbx
Total Num Of Uops: 166
⇨ 14 μops that can only use ports {'0', '1', '5'}
With blocking instructions for ports {'0', '1', '5', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 101.16 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 41.5 0.0 | 41.5 | 0.0 0.0 | 0.0 0.0 | 0.0 | 41.5 | 41.5 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 0.5 | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | 0.5 | | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 1 | 0.5 | | | | | 0.5 | | | mov ch, 0x0
| 1 | | 0.5 | | | | | 0.5 | | mov ch, 0x0
| 66 | 17.5 | 15.5 | | | | 15.5 | 17.5 | | idiv rbx
Total Num Of Uops: 166
⇨ 20 μops that can only use ports {'0', '1', '5', '6'}