CMOVBE (R32, R32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c2          	movd   r10d,mm0
   4:	41 0f 7e c3          	movd   r11d,mm0
   8:	41 0f 7e c4          	movd   r12d,mm0
   c:	0f 7e c3             	movd   ebx,mm0
   f:	0f 7e c1             	movd   ecx,mm0
  12:	0f 7e c2             	movd   edx,mm0
  15:	41 0f 7e c2          	movd   r10d,mm0
  19:	41 0f 7e c3          	movd   r11d,mm0
  1d:	41 0f 7e c4          	movd   r12d,mm0
  21:	0f 7e c3             	movd   ebx,mm0
  24:	45 0f 46 c1          	cmovbe r8d,r9d

Init:
```
PXOR MM0, MM0
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.09
- Reference cycles: 5.03
- UOPS_PORT_0: 9.99

With blocking instructions for ports {'0', '1'}:

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	45 0f 46 c1          	cmovbe r8d,r9d

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.2
- Reference cycles: 2.43
- UOPS_PORT_0: 4.97
- UOPS_PORT_1: 5.04

With blocking instructions for ports {'0', '5'}:

Code:

   0:	0f 6f c1             	movq   mm0,mm1
   3:	0f 6f d1             	movq   mm2,mm1
   6:	0f 6f d9             	movq   mm3,mm1
   9:	0f 6f e1             	movq   mm4,mm1
   c:	0f 6f e9             	movq   mm5,mm1
   f:	0f 6f f1             	movq   mm6,mm1
  12:	0f 6f f9             	movq   mm7,mm1
  15:	0f 6f c1             	movq   mm0,mm1
  18:	0f 6f d1             	movq   mm2,mm1
  1b:	0f 6f d9             	movq   mm3,mm1
  1e:	45 0f 46 c1          	cmovbe r8d,r9d

Init:
```
PXOR MM1, MM1
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.12
- Reference cycles: 3.12
- UOPS_PORT_5: 5.0
- UOPS_PORT_0: 5.0

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c2 00       	rol    r10w,0x0
   5:	66 41 c1 c3 00       	rol    r11w,0x0
   a:	66 41 c1 c4 00       	rol    r12w,0x0
   f:	66 c1 c3 00          	rol    bx,0x0
  13:	66 c1 c1 00          	rol    cx,0x0
  17:	66 c1 c2 00          	rol    dx,0x0
  1b:	66 41 c1 c2 00       	rol    r10w,0x0
  20:	66 41 c1 c3 00       	rol    r11w,0x0
  25:	66 41 c1 c4 00       	rol    r12w,0x0
  2a:	66 c1 c3 00          	rol    bx,0x0
  2e:	45 0f 46 c1          	cmovbe r8d,r9d

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.08
- Reference cycles: 2.77
- UOPS_PORT_0: 5.98
- UOPS_PORT_6: 6.02

⇨ 2 μops that can only use ports {'0', '6'}