ADD (M32, I32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 44 0f 50 c0       	movmskpd r8d,xmm0
   5:	66 44 0f 50 c8       	movmskpd r9d,xmm0
   a:	66 44 0f 50 d0       	movmskpd r10d,xmm0
   f:	66 44 0f 50 d8       	movmskpd r11d,xmm0
  14:	66 44 0f 50 e0       	movmskpd r12d,xmm0
  19:	66 0f 50 d8          	movmskpd ebx,xmm0
  1d:	66 0f 50 c8          	movmskpd ecx,xmm0
  21:	66 0f 50 d0          	movmskpd edx,xmm0
  25:	66 44 0f 50 c0       	movmskpd r8d,xmm0
  2a:	66 44 0f 50 c8       	movmskpd r9d,xmm0
  2f:	66 44 0f 50 d0       	movmskpd r10d,xmm0
  34:	66 44 0f 50 d8       	movmskpd r11d,xmm0
  39:	41 81 06 00 00 00 01 	add    DWORD PTR [r14],0x1000000

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 11.98
- Reference cycles: 9.96
- UOPS_PORT_0: 12.01
- UOPS_PORT_1: 0.05
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 1.0
- UOPS_PORT_4: 1.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 16.0

With blocking instructions for port '1':

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  30:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  35:	41 81 06 00 00 00 01 	add    DWORD PTR [r14],0x1000000

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 11.99
- Reference cycles: 9.88
- UOPS_PORT_0: 0.07
- UOPS_PORT_1: 11.98
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 1.0
- UOPS_PORT_4: 1.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 16.0

With blocking instructions for port '2':

Code:

   0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
   6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
   c:	f2 41 0f f0 56 60    	lddqu  xmm2,[r14+0x60]
  12:	f2 41 0f f0 5e 70    	lddqu  xmm3,[r14+0x70]
  18:	f2 41 0f f0 a6 80 00 	lddqu  xmm4,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 ae 90 00 	lddqu  xmm5,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 b6 a0 00 	lddqu  xmm6,[r14+0xa0]
  31:	00 00 
  33:	f2 41 0f f0 be b0 00 	lddqu  xmm7,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 86 c0 00 	lddqu  xmm8,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 8e d0 00 	lddqu  xmm9,[r14+0xd0]
  4c:	00 00 
  4e:	f2 45 0f f0 96 e0 00 	lddqu  xmm10,[r14+0xe0]
  55:	00 00 
  57:	f2 45 0f f0 9e f0 00 	lddqu  xmm11,[r14+0xf0]
  5e:	00 00 
  60:	41 81 06 00 00 00 01 	add    DWORD PTR [r14],0x1000000

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.04
- Reference cycles: 10.84
- UOPS_PORT_0: 0.27
- UOPS_PORT_1: 0.27
- UOPS_PORT_2: 13.0
- UOPS_PORT_3: 1.0
- UOPS_PORT_4: 1.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 16.0

⇨ One μop that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  35:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  3c:	41 81 06 00 00 00 01 	add    DWORD PTR [r14],0x1000000

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.05
- Reference cycles: 10.88
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.98
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 13.0
- UOPS_PORT_4: 13.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 28.0

⇨ One μop that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  35:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  3c:	41 81 06 00 00 00 01 	add    DWORD PTR [r14],0x1000000

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.05
- Reference cycles: 10.84
- UOPS_PORT_0: 0.01
- UOPS_PORT_1: 0.98
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 13.0
- UOPS_PORT_4: 13.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 28.0

⇨ One μop that can only use port '4'

With blocking instructions for ports {'0', '5'}:

Code:

   0:	0f 38 1c c1          	pabsb  mm0,mm1
   4:	0f 38 1c d1          	pabsb  mm2,mm1
   8:	0f 38 1c d9          	pabsb  mm3,mm1
   c:	0f 38 1c e1          	pabsb  mm4,mm1
  10:	0f 38 1c e9          	pabsb  mm5,mm1
  14:	0f 38 1c f1          	pabsb  mm6,mm1
  18:	0f 38 1c f9          	pabsb  mm7,mm1
  1c:	0f 38 1c c1          	pabsb  mm0,mm1
  20:	0f 38 1c d1          	pabsb  mm2,mm1
  24:	0f 38 1c d9          	pabsb  mm3,mm1
  28:	0f 38 1c e1          	pabsb  mm4,mm1
  2c:	0f 38 1c e9          	pabsb  mm5,mm1
  30:	0f 38 1c f1          	pabsb  mm6,mm1
  34:	0f 38 1c f9          	pabsb  mm7,mm1
  38:	0f 38 1c c1          	pabsb  mm0,mm1
  3c:	0f 38 1c d1          	pabsb  mm2,mm1
  40:	0f 38 1c d9          	pabsb  mm3,mm1
  44:	0f 38 1c e1          	pabsb  mm4,mm1
  48:	0f 38 1c e9          	pabsb  mm5,mm1
  4c:	0f 38 1c f1          	pabsb  mm6,mm1
  50:	0f 38 1c f9          	pabsb  mm7,mm1
  54:	0f 38 1c c1          	pabsb  mm0,mm1
  58:	0f 38 1c d1          	pabsb  mm2,mm1
  5c:	0f 38 1c d9          	pabsb  mm3,mm1
  60:	41 81 06 00 00 00 01 	add    DWORD PTR [r14],0x1000000

Init:
```
PXOR MM1, MM1
```
Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 12.0
- Reference cycles: 9.92
- UOPS_PORT_0: 12.02
- UOPS_PORT_1: 1.0
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 1.0
- UOPS_PORT_4: 1.0
- UOPS_PORT_5: 13.07
- UOPS_RETIRED.ANY: 28.0

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	41 b8 00 00 00 01    	mov    r8d,0x1000000
   6:	41 b9 00 00 00 01    	mov    r9d,0x1000000
   c:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  12:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  18:	41 bc 00 00 00 01    	mov    r12d,0x1000000
  1e:	bb 00 00 00 01       	mov    ebx,0x1000000
  23:	b9 00 00 00 01       	mov    ecx,0x1000000
  28:	ba 00 00 00 01       	mov    edx,0x1000000
  2d:	41 b8 00 00 00 01    	mov    r8d,0x1000000
  33:	41 b9 00 00 00 01    	mov    r9d,0x1000000
  39:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  3f:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  45:	41 bc 00 00 00 01    	mov    r12d,0x1000000
  4b:	bb 00 00 00 01       	mov    ebx,0x1000000
  50:	b9 00 00 00 01       	mov    ecx,0x1000000
  55:	ba 00 00 00 01       	mov    edx,0x1000000
  5a:	41 b8 00 00 00 01    	mov    r8d,0x1000000
  60:	41 b9 00 00 00 01    	mov    r9d,0x1000000
  66:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  6c:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  72:	41 bc 00 00 00 01    	mov    r12d,0x1000000
  78:	bb 00 00 00 01       	mov    ebx,0x1000000
  7d:	b9 00 00 00 01       	mov    ecx,0x1000000
  82:	ba 00 00 00 01       	mov    edx,0x1000000
  87:	41 b8 00 00 00 01    	mov    r8d,0x1000000
  8d:	41 b9 00 00 00 01    	mov    r9d,0x1000000
  93:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  99:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  9f:	41 bc 00 00 00 01    	mov    r12d,0x1000000
  a5:	bb 00 00 00 01       	mov    ebx,0x1000000
  aa:	b9 00 00 00 01       	mov    ecx,0x1000000
  af:	ba 00 00 00 01       	mov    edx,0x1000000
  b4:	41 b8 00 00 00 01    	mov    r8d,0x1000000
  ba:	41 b9 00 00 00 01    	mov    r9d,0x1000000
  c0:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  c6:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  cc:	41 81 06 00 00 00 01 	add    DWORD PTR [r14],0x1000000

Show nanoBench command
Results:
- Instructions retired: 37.0
- Core cycles: 13.22
- Reference cycles: 10.99
- UOPS_PORT_0: 12.07
- UOPS_PORT_1: 12.26
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 1.0
- UOPS_PORT_4: 1.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 40.0

⇨ One μop that can only use ports {'0', '1', '5'}

With an indexed addressing mode

With blocking instructions for port '2':

Code:

   0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
   6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
   c:	f2 41 0f f0 56 60    	lddqu  xmm2,[r14+0x60]
  12:	f2 41 0f f0 5e 70    	lddqu  xmm3,[r14+0x70]
  18:	f2 41 0f f0 a6 80 00 	lddqu  xmm4,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 ae 90 00 	lddqu  xmm5,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 b6 a0 00 	lddqu  xmm6,[r14+0xa0]
  31:	00 00 
  33:	f2 41 0f f0 be b0 00 	lddqu  xmm7,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 86 c0 00 	lddqu  xmm8,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 8e d0 00 	lddqu  xmm9,[r14+0xd0]
  4c:	00 00 
  4e:	f2 45 0f f0 96 e0 00 	lddqu  xmm10,[r14+0xe0]
  55:	00 00 
  57:	f2 45 0f f0 9e f0 00 	lddqu  xmm11,[r14+0xf0]
  5e:	00 00 
  60:	43 81 04 2e 00 00 00 	add    DWORD PTR [r14+r13*1],0x1000000
  67:	01

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.02
- Reference cycles: 10.84
- UOPS_PORT_0: 0.35
- UOPS_PORT_1: 0.31
- UOPS_PORT_2: 13.0
- UOPS_PORT_3: 1.0
- UOPS_PORT_4: 1.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 16.0

⇨ One μop that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  35:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  3c:	43 81 04 2e 00 00 00 	add    DWORD PTR [r14+r13*1],0x1000000
  43:	01

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.05
- Reference cycles: 10.84
- UOPS_PORT_0: 0.06
- UOPS_PORT_1: 0.98
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 13.0
- UOPS_PORT_4: 13.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 28.0

⇨ One μop that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  35:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  3c:	43 81 04 2e 00 00 00 	add    DWORD PTR [r14+r13*1],0x1000000
  43:	01

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 13.05
- Reference cycles: 10.84
- UOPS_PORT_0: 0.06
- UOPS_PORT_1: 0.98
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 13.0
- UOPS_PORT_4: 13.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 28.0

⇨ One μop that can only use port '4'

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	41 b8 00 00 00 01    	mov    r8d,0x1000000
   6:	41 b9 00 00 00 01    	mov    r9d,0x1000000
   c:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  12:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  18:	41 bc 00 00 00 01    	mov    r12d,0x1000000
  1e:	bb 00 00 00 01       	mov    ebx,0x1000000
  23:	b9 00 00 00 01       	mov    ecx,0x1000000
  28:	ba 00 00 00 01       	mov    edx,0x1000000
  2d:	41 b8 00 00 00 01    	mov    r8d,0x1000000
  33:	41 b9 00 00 00 01    	mov    r9d,0x1000000
  39:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  3f:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  45:	41 bc 00 00 00 01    	mov    r12d,0x1000000
  4b:	bb 00 00 00 01       	mov    ebx,0x1000000
  50:	b9 00 00 00 01       	mov    ecx,0x1000000
  55:	ba 00 00 00 01       	mov    edx,0x1000000
  5a:	41 b8 00 00 00 01    	mov    r8d,0x1000000
  60:	41 b9 00 00 00 01    	mov    r9d,0x1000000
  66:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  6c:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  72:	41 bc 00 00 00 01    	mov    r12d,0x1000000
  78:	bb 00 00 00 01       	mov    ebx,0x1000000
  7d:	b9 00 00 00 01       	mov    ecx,0x1000000
  82:	ba 00 00 00 01       	mov    edx,0x1000000
  87:	41 b8 00 00 00 01    	mov    r8d,0x1000000
  8d:	41 b9 00 00 00 01    	mov    r9d,0x1000000
  93:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  99:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  9f:	41 bc 00 00 00 01    	mov    r12d,0x1000000
  a5:	bb 00 00 00 01       	mov    ebx,0x1000000
  aa:	b9 00 00 00 01       	mov    ecx,0x1000000
  af:	ba 00 00 00 01       	mov    edx,0x1000000
  b4:	41 b8 00 00 00 01    	mov    r8d,0x1000000
  ba:	41 b9 00 00 00 01    	mov    r9d,0x1000000
  c0:	41 ba 00 00 00 01    	mov    r10d,0x1000000
  c6:	41 bb 00 00 00 01    	mov    r11d,0x1000000
  cc:	43 81 04 2e 00 00 00 	add    DWORD PTR [r14+r13*1],0x1000000
  d3:	01

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 37.0
- Core cycles: 13.26
- Reference cycles: 11.11
- UOPS_PORT_0: 11.96
- UOPS_PORT_1: 12.22
- UOPS_PORT_2: 1.0
- UOPS_PORT_3: 1.0
- UOPS_PORT_4: 1.0
- UOPS_PORT_5: 0.0
- UOPS_RETIRED.ANY: 40.0

⇨ One μop that can only use ports {'0', '1', '5'}