VPINSRQ (XMM, XMM, R64, I8) - Port Usage

With blocking instructions for port '1':

Code:

   0:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
   7:	00 
   8:	47 8d 94 6e 80 00 00 	lea    r10d,[r14+r13*2+0x80]
   f:	00 
  10:	47 8d 9c 6e 80 00 00 	lea    r11d,[r14+r13*2+0x80]
  17:	00 
  18:	47 8d a4 6e 80 00 00 	lea    r12d,[r14+r13*2+0x80]
  1f:	00 
  20:	43 8d 9c 6e 80 00 00 	lea    ebx,[r14+r13*2+0x80]
  27:	00 
  28:	43 8d 8c 6e 80 00 00 	lea    ecx,[r14+r13*2+0x80]
  2f:	00 
  30:	43 8d 94 6e 80 00 00 	lea    edx,[r14+r13*2+0x80]
  37:	00 
  38:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
  3f:	00 
  40:	47 8d 94 6e 80 00 00 	lea    r10d,[r14+r13*2+0x80]
  47:	00 
  48:	47 8d 9c 6e 80 00 00 	lea    r11d,[r14+r13*2+0x80]
  4f:	00 
  50:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.16
- Reference cycles: 11.2
- UOPS_PORT_1: 10.0

With blocking instructions for port '5':

Code:

   0:	41 0f 6e c1          	movd   mm0,r9d
   4:	41 0f 6e c9          	movd   mm1,r9d
   8:	41 0f 6e d1          	movd   mm2,r9d
   c:	41 0f 6e d9          	movd   mm3,r9d
  10:	41 0f 6e e1          	movd   mm4,r9d
  14:	41 0f 6e e9          	movd   mm5,r9d
  18:	41 0f 6e f1          	movd   mm6,r9d
  1c:	41 0f 6e f9          	movd   mm7,r9d
  20:	41 0f 6e c1          	movd   mm0,r9d
  24:	41 0f 6e c9          	movd   mm1,r9d
  28:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.05
- Reference cycles: 12.16
- UOPS_PORT_5: 11.0

⇨ One μop that can only use port '5'

With blocking instructions for ports {'0', '1'}:

Code:

   0:	45 8d 0e             	lea    r9d,[r14]
   3:	45 8d 16             	lea    r10d,[r14]
   6:	45 8d 1e             	lea    r11d,[r14]
   9:	45 8d 26             	lea    r12d,[r14]
   c:	41 8d 1e             	lea    ebx,[r14]
   f:	41 8d 0e             	lea    ecx,[r14]
  12:	41 8d 16             	lea    edx,[r14]
  15:	45 8d 0e             	lea    r9d,[r14]
  18:	45 8d 16             	lea    r10d,[r14]
  1b:	45 8d 1e             	lea    r11d,[r14]
  1e:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.05
- Reference cycles: 5.49
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 4.99

With blocking instructions for ports {'1', '5'}:

Code:

   0:	0f fc c1             	paddb  mm0,mm1
   3:	0f fc d1             	paddb  mm2,mm1
   6:	0f fc d9             	paddb  mm3,mm1
   9:	0f fc e1             	paddb  mm4,mm1
   c:	0f fc e9             	paddb  mm5,mm1
   f:	0f fc f1             	paddb  mm6,mm1
  12:	0f fc f9             	paddb  mm7,mm1
  15:	0f fc c1             	paddb  mm0,mm1
  18:	0f fc d1             	paddb  mm2,mm1
  1b:	0f fc d9             	paddb  mm3,mm1
  1e:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM0, MM0;
PXOR MM1, MM1;
PXOR MM2, MM2;
PXOR MM3, MM3;
PXOR MM4, MM4;
PXOR MM5, MM5;
PXOR MM6, MM6;
PXOR MM7, MM7;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.05
- Reference cycles: 6.72
- UOPS_PORT_5: 6.0
- UOPS_PORT_1: 6.0

⇨ One μop that can only use ports {'1', '5'}