PBLENDVB (XMM, XMM) - Port Usage

With blocking instructions for port '1':

Code:

   0:	66 0f 58 dc          	addpd  xmm3,xmm4
   4:	66 0f 58 ec          	addpd  xmm5,xmm4
   8:	66 0f 58 f4          	addpd  xmm6,xmm4
   c:	66 0f 58 fc          	addpd  xmm7,xmm4
  10:	66 44 0f 58 c4       	addpd  xmm8,xmm4
  15:	66 44 0f 58 cc       	addpd  xmm9,xmm4
  1a:	66 44 0f 58 d4       	addpd  xmm10,xmm4
  1f:	66 44 0f 58 dc       	addpd  xmm11,xmm4
  24:	66 44 0f 58 e4       	addpd  xmm12,xmm4
  29:	66 0f 58 dc          	addpd  xmm3,xmm4
  2d:	66 0f 38 10 ca       	pblendvb xmm1,xmm2,xmm0

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.18
- Reference cycles: 11.2
- UOPS_PORT_1: 10.0

With blocking instructions for port '5':

Code:

   0:	66 0f 55 dc          	andnpd xmm3,xmm4
   4:	66 0f 55 ec          	andnpd xmm5,xmm4
   8:	66 0f 55 f4          	andnpd xmm6,xmm4
   c:	66 0f 55 fc          	andnpd xmm7,xmm4
  10:	66 44 0f 55 c4       	andnpd xmm8,xmm4
  15:	66 44 0f 55 cc       	andnpd xmm9,xmm4
  1a:	66 44 0f 55 d4       	andnpd xmm10,xmm4
  1f:	66 44 0f 55 dc       	andnpd xmm11,xmm4
  24:	66 44 0f 55 e4       	andnpd xmm12,xmm4
  29:	66 0f 55 dc          	andnpd xmm3,xmm4
  2d:	66 0f 38 10 ca       	pblendvb xmm1,xmm2,xmm0

Init:

VZEROALL;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.04
- Reference cycles: 11.09
- UOPS_PORT_5: 10.0

With blocking instructions for ports {'0', '1'}:

Code:

   0:	45 8d 06             	lea    r8d,[r14]
   3:	45 8d 0e             	lea    r9d,[r14]
   6:	45 8d 16             	lea    r10d,[r14]
   9:	45 8d 1e             	lea    r11d,[r14]
   c:	45 8d 26             	lea    r12d,[r14]
   f:	41 8d 1e             	lea    ebx,[r14]
  12:	41 8d 0e             	lea    ecx,[r14]
  15:	41 8d 16             	lea    edx,[r14]
  18:	45 8d 06             	lea    r8d,[r14]
  1b:	45 8d 0e             	lea    r9d,[r14]
  1e:	66 0f 38 10 ca       	pblendvb xmm1,xmm2,xmm0

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.05
- Reference cycles: 5.6
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 4.99

With blocking instructions for ports {'0', '5'}:

Code:

   0:	66 41 c1 c0 00       	rol    r8w,0x0
   5:	66 41 c1 c1 00       	rol    r9w,0x0
   a:	66 41 c1 c2 00       	rol    r10w,0x0
   f:	66 41 c1 c3 00       	rol    r11w,0x0
  14:	66 41 c1 c4 00       	rol    r12w,0x0
  19:	66 c1 c3 00          	rol    bx,0x0
  1d:	66 c1 c1 00          	rol    cx,0x0
  21:	66 c1 c2 00          	rol    dx,0x0
  25:	66 41 c1 c0 00       	rol    r8w,0x0
  2a:	66 41 c1 c1 00       	rol    r9w,0x0
  2f:	66 0f 38 10 ca       	pblendvb xmm1,xmm2,xmm0

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.05
- Reference cycles: 5.55
- UOPS_PORT_5: 5.0
- UOPS_PORT_0: 5.0

With blocking instructions for ports {'1', '5'}:

Code:

   0:	0f 38 1c c1          	pabsb  mm0,mm1
   4:	0f 38 1c d1          	pabsb  mm2,mm1
   8:	0f 38 1c d9          	pabsb  mm3,mm1
   c:	0f 38 1c e1          	pabsb  mm4,mm1
  10:	0f 38 1c e9          	pabsb  mm5,mm1
  14:	0f 38 1c f1          	pabsb  mm6,mm1
  18:	0f 38 1c f9          	pabsb  mm7,mm1
  1c:	0f 38 1c c1          	pabsb  mm0,mm1
  20:	0f 38 1c d1          	pabsb  mm2,mm1
  24:	0f 38 1c d9          	pabsb  mm3,mm1
  28:	66 0f 38 10 ca       	pblendvb xmm1,xmm2,xmm0

Init:

VZEROALL;
PXOR MM1, MM1;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.05
- Reference cycles: 6.67
- UOPS_PORT_5: 6.0
- UOPS_PORT_1: 6.0

⇨ 2 μops that can only use ports {'1', '5'}