VPADDD (YMM, YMM, M256) - Port Usage (IACA 3.0)


With blocking instructions for ports {'1', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.45 Cycles       Throughput Bottleneck: Backend
Loop Count:  23
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.0     0.0  |  5.5  |  0.5     0.5  |  0.5     0.5  |  0.0  |  5.5  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r8w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r9w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r10w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r11w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r12w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea bx, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea cx, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea dx, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r8w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r9w, ptr [r14]
|   2^     |             | 0.5  | 0.5     0.5 | 0.5     0.5 |      | 0.5  |      |      | vpaddd ymm0, ymm1, ymmword ptr [r14]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.53 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.0     0.0  |  0.5  |  5.5     5.5  |  5.5     5.5  |  0.0  |  0.5  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   2^     |             | 0.5  | 0.5     0.5 | 0.5     0.5 |      | 0.5  |      |      | vpaddd ymm0, ymm1, ymmword ptr [r14]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}

With an indexed addressing mode


With blocking instructions for ports {'1', '5'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.45 Cycles       Throughput Bottleneck: Backend
Loop Count:  23
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.0     0.0  |  5.5  |  0.5     0.5  |  0.5     0.5  |  0.0  |  5.5  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r8w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r9w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r10w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r11w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r12w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea bx, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea cx, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea dx, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r8w, ptr [r14]
|   1      |             | 0.5  |             |             |      | 0.5  |      |      | lea r9w, ptr [r14]
|   2      |             | 0.5  | 0.5     0.5 | 0.5     0.5 |      | 0.5  |      |      | vpaddd ymm0, ymm1, ymmword ptr [r14+r13*1]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.53 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.0     0.0  |  0.5  |  5.5     5.5  |  5.5     5.5  |  0.0  |  0.5  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dh, byte ptr [rdi+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ah, byte ptr [rdi+0x43]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bh, byte ptr [rdi+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov ch, byte ptr [rdi+0x41]
|   2      |             | 0.5  | 0.5     0.5 | 0.5     0.5 |      | 0.5  |      |      | vpaddd ymm0, ymm1, ymmword ptr [r14+r13*1]
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}