VMASKMOVPS (YMM, YMM, M256) - Port Usage

With blocking instructions for port '5':

• Code:

     0:	41 0f 6e c0          	movd   mm0,r8d
     4:	41 0f 6e c8          	movd   mm1,r8d
     8:	41 0f 6e d0          	movd   mm2,r8d
     c:	41 0f 6e d8          	movd   mm3,r8d
    10:	41 0f 6e e0          	movd   mm4,r8d
    14:	41 0f 6e e8          	movd   mm5,r8d
    18:	41 0f 6e f0          	movd   mm6,r8d
    1c:	41 0f 6e f8          	movd   mm7,r8d
    20:	41 0f 6e c0          	movd   mm0,r8d
    24:	41 0f 6e c8          	movd   mm1,r8d
    28:	c4 c2 75 2c 06       	vmaskmovps ymm0,ymm1,YMMWORD PTR [r14]
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM1, YMM1, YMM1;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 12.04
  • Reference cycles: 12.0
  • UOPS_PORT_5: 11.99

With blocking instructions for ports {'2', '3'}:

• Code:

     0:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
     4:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
     8:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
     c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
    10:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
    14:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
    18:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
    1c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
    20:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
    24:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
    28:	c4 c2 75 2c 06       	vmaskmovps ymm0,ymm1,YMMWORD PTR [r14]
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM1, YMM1, YMM1;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 5.61
  • Reference cycles: 5.65
  • UOPS_PORT_2: 5.49
  • UOPS_PORT_3: 5.49

With an indexed addressing mode

With blocking instructions for port '5':

• Code:

     0:	41 0f 6e c0          	movd   mm0,r8d
     4:	41 0f 6e c8          	movd   mm1,r8d
     8:	41 0f 6e d0          	movd   mm2,r8d
     c:	41 0f 6e d8          	movd   mm3,r8d
    10:	41 0f 6e e0          	movd   mm4,r8d
    14:	41 0f 6e e8          	movd   mm5,r8d
    18:	41 0f 6e f0          	movd   mm6,r8d
    1c:	41 0f 6e f8          	movd   mm7,r8d
    20:	41 0f 6e c0          	movd   mm0,r8d
    24:	41 0f 6e c8          	movd   mm1,r8d
    28:	c4 82 75 2c 04 2e    	vmaskmovps ymm0,ymm1,YMMWORD PTR [r14+r13*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM1, YMM1, YMM1;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 12.04
  • Reference cycles: 12.0
  • UOPS_PORT_5: 11.99

With blocking instructions for ports {'2', '3'}:

• Code:

     0:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
     4:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
     8:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
     c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
    10:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
    14:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
    18:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
    1c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
    20:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
    24:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
    28:	c4 82 75 2c 04 2e    	vmaskmovps ymm0,ymm1,YMMWORD PTR [r14+r13*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM1, YMM1, YMM1;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  XOR R13, R13

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 5.61
  • Reference cycles: 5.6
  • UOPS_PORT_2: 5.49
  • UOPS_PORT_3: 5.49