VGATHERQPD (YMM, VSIB_YMM, YMM) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c0          	movd   r8d,mm0
   4:	41 0f 7e c1          	movd   r9d,mm0
   8:	41 0f 7e c2          	movd   r10d,mm0
   c:	41 0f 7e c3          	movd   r11d,mm0
  10:	41 0f 7e c4          	movd   r12d,mm0
  14:	0f 7e c3             	movd   ebx,mm0
  17:	0f 7e c1             	movd   ecx,mm0
  1a:	0f 7e c2             	movd   edx,mm0
  1d:	41 0f 7e c0          	movd   r8d,mm0
  21:	41 0f 7e c1          	movd   r9d,mm0
  25:	41 0f 7e c2          	movd   r10d,mm0
  29:	41 0f 7e c3          	movd   r11d,mm0
  2d:	41 0f 7e c4          	movd   r12d,mm0
  31:	0f 7e c3             	movd   ebx,mm0
  34:	0f 7e c1             	movd   ecx,mm0
  37:	0f 7e c2             	movd   edx,mm0
  3a:	41 0f 7e c0          	movd   r8d,mm0
  3e:	41 0f 7e c1          	movd   r9d,mm0
  42:	41 0f 7e c2          	movd   r10d,mm0
  46:	41 0f 7e c3          	movd   r11d,mm0
  4a:	41 0f 7e c4          	movd   r12d,mm0
  4e:	0f 7e c3             	movd   ebx,mm0
  51:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM0, MM0;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 27.98
- Reference cycles: 28.21
- UOPS_PORT_0: 27.0

⇨ 5 μops that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	47 8d 84 6e 80 00 00 	lea    r8d,[r14+r13*2+0x80]
   7:	00 
   8:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
   f:	00 
  10:	47 8d 94 6e 80 00 00 	lea    r10d,[r14+r13*2+0x80]
  17:	00 
  18:	47 8d 9c 6e 80 00 00 	lea    r11d,[r14+r13*2+0x80]
  1f:	00 
  20:	47 8d a4 6e 80 00 00 	lea    r12d,[r14+r13*2+0x80]
  27:	00 
  28:	43 8d 9c 6e 80 00 00 	lea    ebx,[r14+r13*2+0x80]
  2f:	00 
  30:	43 8d 8c 6e 80 00 00 	lea    ecx,[r14+r13*2+0x80]
  37:	00 
  38:	43 8d 94 6e 80 00 00 	lea    edx,[r14+r13*2+0x80]
  3f:	00 
  40:	47 8d 84 6e 80 00 00 	lea    r8d,[r14+r13*2+0x80]
  47:	00 
  48:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
  4f:	00 
  50:	47 8d 94 6e 80 00 00 	lea    r10d,[r14+r13*2+0x80]
  57:	00 
  58:	47 8d 9c 6e 80 00 00 	lea    r11d,[r14+r13*2+0x80]
  5f:	00 
  60:	47 8d a4 6e 80 00 00 	lea    r12d,[r14+r13*2+0x80]
  67:	00 
  68:	43 8d 9c 6e 80 00 00 	lea    ebx,[r14+r13*2+0x80]
  6f:	00 
  70:	43 8d 8c 6e 80 00 00 	lea    ecx,[r14+r13*2+0x80]
  77:	00 
  78:	43 8d 94 6e 80 00 00 	lea    edx,[r14+r13*2+0x80]
  7f:	00 
  80:	47 8d 84 6e 80 00 00 	lea    r8d,[r14+r13*2+0x80]
  87:	00 
  88:	47 8d 8c 6e 80 00 00 	lea    r9d,[r14+r13*2+0x80]
  8f:	00 
  90:	47 8d 94 6e 80 00 00 	lea    r10d,[r14+r13*2+0x80]
  97:	00 
  98:	47 8d 9c 6e 80 00 00 	lea    r11d,[r14+r13*2+0x80]
  9f:	00 
  a0:	47 8d a4 6e 80 00 00 	lea    r12d,[r14+r13*2+0x80]
  a7:	00 
  a8:	43 8d 9c 6e 80 00 00 	lea    ebx,[r14+r13*2+0x80]
  af:	00 
  b0:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 22.23
- Reference cycles: 22.28
- UOPS_PORT_1: 22.0

With blocking instructions for port '5':

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	41 0f 6e d0          	movd   mm2,r8d
  2c:	41 0f 6e d8          	movd   mm3,r8d
  30:	41 0f 6e e0          	movd   mm4,r8d
  34:	41 0f 6e e8          	movd   mm5,r8d
  38:	41 0f 6e f0          	movd   mm6,r8d
  3c:	41 0f 6e f8          	movd   mm7,r8d
  40:	41 0f 6e c0          	movd   mm0,r8d
  44:	41 0f 6e c8          	movd   mm1,r8d
  48:	41 0f 6e d0          	movd   mm2,r8d
  4c:	41 0f 6e d8          	movd   mm3,r8d
  50:	41 0f 6e e0          	movd   mm4,r8d
  54:	41 0f 6e e8          	movd   mm5,r8d
  58:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 26.4
- Reference cycles: 26.67
- UOPS_PORT_5: 25.98

⇨ 4 μops that can only use port '5'

With blocking instructions for ports {'0', '1'}:

Code:

   0:	c4 e2 e1 98 d4       	vfmadd132pd xmm2,xmm3,xmm4
   5:	c4 e2 e1 98 ec       	vfmadd132pd xmm5,xmm3,xmm4
   a:	c4 e2 e1 98 f4       	vfmadd132pd xmm6,xmm3,xmm4
   f:	c4 e2 e1 98 fc       	vfmadd132pd xmm7,xmm3,xmm4
  14:	c4 62 e1 98 c4       	vfmadd132pd xmm8,xmm3,xmm4
  19:	c4 62 e1 98 cc       	vfmadd132pd xmm9,xmm3,xmm4
  1e:	c4 62 e1 98 d4       	vfmadd132pd xmm10,xmm3,xmm4
  23:	c4 62 e1 98 dc       	vfmadd132pd xmm11,xmm3,xmm4
  28:	c4 62 e1 98 e4       	vfmadd132pd xmm12,xmm3,xmm4
  2d:	c4 e2 e1 98 d4       	vfmadd132pd xmm2,xmm3,xmm4
  32:	c4 e2 e1 98 ec       	vfmadd132pd xmm5,xmm3,xmm4
  37:	c4 e2 e1 98 f4       	vfmadd132pd xmm6,xmm3,xmm4
  3c:	c4 e2 e1 98 fc       	vfmadd132pd xmm7,xmm3,xmm4
  41:	c4 62 e1 98 c4       	vfmadd132pd xmm8,xmm3,xmm4
  46:	c4 62 e1 98 cc       	vfmadd132pd xmm9,xmm3,xmm4
  4b:	c4 62 e1 98 d4       	vfmadd132pd xmm10,xmm3,xmm4
  50:	c4 62 e1 98 dc       	vfmadd132pd xmm11,xmm3,xmm4
  55:	c4 62 e1 98 e4       	vfmadd132pd xmm12,xmm3,xmm4
  5a:	c4 e2 e1 98 d4       	vfmadd132pd xmm2,xmm3,xmm4
  5f:	c4 e2 e1 98 ec       	vfmadd132pd xmm5,xmm3,xmm4
  64:	c4 e2 e1 98 f4       	vfmadd132pd xmm6,xmm3,xmm4
  69:	c4 e2 e1 98 fc       	vfmadd132pd xmm7,xmm3,xmm4
  6e:	c4 62 e1 98 c4       	vfmadd132pd xmm8,xmm3,xmm4
  73:	c4 62 e1 98 cc       	vfmadd132pd xmm9,xmm3,xmm4
  78:	c4 62 e1 98 d4       	vfmadd132pd xmm10,xmm3,xmm4
  7d:	c4 62 e1 98 dc       	vfmadd132pd xmm11,xmm3,xmm4
  82:	c4 62 e1 98 e4       	vfmadd132pd xmm12,xmm3,xmm4
  87:	c4 e2 e1 98 d4       	vfmadd132pd xmm2,xmm3,xmm4
  8c:	c4 e2 e1 98 ec       	vfmadd132pd xmm5,xmm3,xmm4
  91:	c4 e2 e1 98 f4       	vfmadd132pd xmm6,xmm3,xmm4
  96:	c4 e2 e1 98 fc       	vfmadd132pd xmm7,xmm3,xmm4
  9b:	c4 62 e1 98 c4       	vfmadd132pd xmm8,xmm3,xmm4
  a0:	c4 62 e1 98 cc       	vfmadd132pd xmm9,xmm3,xmm4
  a5:	c4 62 e1 98 d4       	vfmadd132pd xmm10,xmm3,xmm4
  aa:	c4 62 e1 98 dc       	vfmadd132pd xmm11,xmm3,xmm4
  af:	c4 62 e1 98 e4       	vfmadd132pd xmm12,xmm3,xmm4
  b4:	c4 e2 e1 98 d4       	vfmadd132pd xmm2,xmm3,xmm4
  b9:	c4 e2 e1 98 ec       	vfmadd132pd xmm5,xmm3,xmm4
  be:	c4 e2 e1 98 f4       	vfmadd132pd xmm6,xmm3,xmm4
  c3:	c4 e2 e1 98 fc       	vfmadd132pd xmm7,xmm3,xmm4
  c8:	c4 62 e1 98 c4       	vfmadd132pd xmm8,xmm3,xmm4
  cd:	c4 62 e1 98 cc       	vfmadd132pd xmm9,xmm3,xmm4
  d2:	c4 62 e1 98 d4       	vfmadd132pd xmm10,xmm3,xmm4
  d7:	c4 62 e1 98 dc       	vfmadd132pd xmm11,xmm3,xmm4
  dc:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM2, [R14];
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VMOVUPD XMM5, [R14];
VMOVUPD XMM6, [R14];
VMOVUPD XMM7, [R14];
VMOVUPD XMM8, [R14];
VMOVUPD XMM9, [R14];
VMOVUPD XMM10, [R14];
VMOVUPD XMM11, [R14];
VMOVUPD XMM12, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 45.0
- Core cycles: 27.27
- Reference cycles: 26.91
- UOPS_PORT_1: 23.59
- UOPS_PORT_0: 25.41

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c0 00       	rol    r8w,0x0
   5:	66 41 c1 c1 00       	rol    r9w,0x0
   a:	66 41 c1 c2 00       	rol    r10w,0x0
   f:	66 41 c1 c3 00       	rol    r11w,0x0
  14:	66 41 c1 c4 00       	rol    r12w,0x0
  19:	66 c1 c3 00          	rol    bx,0x0
  1d:	66 c1 c1 00          	rol    cx,0x0
  21:	66 c1 c2 00          	rol    dx,0x0
  25:	66 41 c1 c0 00       	rol    r8w,0x0
  2a:	66 41 c1 c1 00       	rol    r9w,0x0
  2f:	66 41 c1 c2 00       	rol    r10w,0x0
  34:	66 41 c1 c3 00       	rol    r11w,0x0
  39:	66 41 c1 c4 00       	rol    r12w,0x0
  3e:	66 c1 c3 00          	rol    bx,0x0
  42:	66 c1 c1 00          	rol    cx,0x0
  46:	66 c1 c2 00          	rol    dx,0x0
  4a:	66 41 c1 c0 00       	rol    r8w,0x0
  4f:	66 41 c1 c1 00       	rol    r9w,0x0
  54:	66 41 c1 c2 00       	rol    r10w,0x0
  59:	66 41 c1 c3 00       	rol    r11w,0x0
  5e:	66 41 c1 c4 00       	rol    r12w,0x0
  63:	66 c1 c3 00          	rol    bx,0x0
  67:	66 c1 c1 00          	rol    cx,0x0
  6b:	66 c1 c2 00          	rol    dx,0x0
  6f:	66 41 c1 c0 00       	rol    r8w,0x0
  74:	66 41 c1 c1 00       	rol    r9w,0x0
  79:	66 41 c1 c2 00       	rol    r10w,0x0
  7e:	66 41 c1 c3 00       	rol    r11w,0x0
  83:	66 41 c1 c4 00       	rol    r12w,0x0
  88:	66 c1 c3 00          	rol    bx,0x0
  8c:	66 c1 c1 00          	rol    cx,0x0
  90:	66 c1 c2 00          	rol    dx,0x0
  94:	66 41 c1 c0 00       	rol    r8w,0x0
  99:	66 41 c1 c1 00       	rol    r9w,0x0
  9e:	66 41 c1 c2 00       	rol    r10w,0x0
  a3:	66 41 c1 c3 00       	rol    r11w,0x0
  a8:	66 41 c1 c4 00       	rol    r12w,0x0
  ad:	66 c1 c3 00          	rol    bx,0x0
  b1:	66 c1 c1 00          	rol    cx,0x0
  b5:	66 c1 c2 00          	rol    dx,0x0
  b9:	66 41 c1 c0 00       	rol    r8w,0x0
  be:	66 41 c1 c1 00       	rol    r9w,0x0
  c3:	66 41 c1 c2 00       	rol    r10w,0x0
  c8:	66 41 c1 c3 00       	rol    r11w,0x0
  cd:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 45.0
- Core cycles: 28.39
- Reference cycles: 28.12
- UOPS_PORT_6: 27.41
- UOPS_PORT_0: 26.55

⇨ 5 μops that can only use ports {'0', '6'}

With blocking instructions for ports {'1', '5'}:

Code:

   0:	45 8d 06             	lea    r8d,[r14]
   3:	45 8d 0e             	lea    r9d,[r14]
   6:	45 8d 16             	lea    r10d,[r14]
   9:	45 8d 1e             	lea    r11d,[r14]
   c:	45 8d 26             	lea    r12d,[r14]
   f:	41 8d 1e             	lea    ebx,[r14]
  12:	41 8d 0e             	lea    ecx,[r14]
  15:	41 8d 16             	lea    edx,[r14]
  18:	45 8d 06             	lea    r8d,[r14]
  1b:	45 8d 0e             	lea    r9d,[r14]
  1e:	45 8d 16             	lea    r10d,[r14]
  21:	45 8d 1e             	lea    r11d,[r14]
  24:	45 8d 26             	lea    r12d,[r14]
  27:	41 8d 1e             	lea    ebx,[r14]
  2a:	41 8d 0e             	lea    ecx,[r14]
  2d:	41 8d 16             	lea    edx,[r14]
  30:	45 8d 06             	lea    r8d,[r14]
  33:	45 8d 0e             	lea    r9d,[r14]
  36:	45 8d 16             	lea    r10d,[r14]
  39:	45 8d 1e             	lea    r11d,[r14]
  3c:	45 8d 26             	lea    r12d,[r14]
  3f:	41 8d 1e             	lea    ebx,[r14]
  42:	41 8d 0e             	lea    ecx,[r14]
  45:	41 8d 16             	lea    edx,[r14]
  48:	45 8d 06             	lea    r8d,[r14]
  4b:	45 8d 0e             	lea    r9d,[r14]
  4e:	45 8d 16             	lea    r10d,[r14]
  51:	45 8d 1e             	lea    r11d,[r14]
  54:	45 8d 26             	lea    r12d,[r14]
  57:	41 8d 1e             	lea    ebx,[r14]
  5a:	41 8d 0e             	lea    ecx,[r14]
  5d:	41 8d 16             	lea    edx,[r14]
  60:	45 8d 06             	lea    r8d,[r14]
  63:	45 8d 0e             	lea    r9d,[r14]
  66:	45 8d 16             	lea    r10d,[r14]
  69:	45 8d 1e             	lea    r11d,[r14]
  6c:	45 8d 26             	lea    r12d,[r14]
  6f:	41 8d 1e             	lea    ebx,[r14]
  72:	41 8d 0e             	lea    ecx,[r14]
  75:	41 8d 16             	lea    edx,[r14]
  78:	45 8d 06             	lea    r8d,[r14]
  7b:	45 8d 0e             	lea    r9d,[r14]
  7e:	45 8d 16             	lea    r10d,[r14]
  81:	45 8d 1e             	lea    r11d,[r14]
  84:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 45.0
- Core cycles: 25.39
- Reference cycles: 25.45
- UOPS_PORT_5: 24.5
- UOPS_PORT_1: 24.45

⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'2', '3'}:

Code:

   0:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
   4:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
   8:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
   c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  10:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  14:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  18:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  1c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  20:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  24:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  28:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
  2c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  30:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  34:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  38:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  3c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  40:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  44:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  48:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
  4c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  50:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  54:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  58:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  5c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  60:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  64:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  68:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
  6c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  70:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  74:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  78:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  7c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  80:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  84:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  88:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
  8c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  90:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  94:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  98:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  9c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  a0:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  a4:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  a8:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
  ac:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  b0:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 45.0
- Core cycles: 25.73
- Reference cycles: 25.45
- UOPS_PORT_2: 24.0
- UOPS_PORT_3: 24.0

⇨ 4 μops that can only use ports {'2', '3'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	0f 6f c1             	movq   mm0,mm1
   3:	0f 6f d1             	movq   mm2,mm1
   6:	0f 6f d9             	movq   mm3,mm1
   9:	0f 6f e1             	movq   mm4,mm1
   c:	0f 6f e9             	movq   mm5,mm1
   f:	0f 6f f1             	movq   mm6,mm1
  12:	0f 6f f9             	movq   mm7,mm1
  15:	0f 6f c1             	movq   mm0,mm1
  18:	0f 6f d1             	movq   mm2,mm1
  1b:	0f 6f d9             	movq   mm3,mm1
  1e:	0f 6f e1             	movq   mm4,mm1
  21:	0f 6f e9             	movq   mm5,mm1
  24:	0f 6f f1             	movq   mm6,mm1
  27:	0f 6f f9             	movq   mm7,mm1
  2a:	0f 6f c1             	movq   mm0,mm1
  2d:	0f 6f d1             	movq   mm2,mm1
  30:	0f 6f d9             	movq   mm3,mm1
  33:	0f 6f e1             	movq   mm4,mm1
  36:	0f 6f e9             	movq   mm5,mm1
  39:	0f 6f f1             	movq   mm6,mm1
  3c:	0f 6f f9             	movq   mm7,mm1
  3f:	0f 6f c1             	movq   mm0,mm1
  42:	0f 6f d1             	movq   mm2,mm1
  45:	0f 6f d9             	movq   mm3,mm1
  48:	0f 6f e1             	movq   mm4,mm1
  4b:	0f 6f e9             	movq   mm5,mm1
  4e:	0f 6f f1             	movq   mm6,mm1
  51:	0f 6f f9             	movq   mm7,mm1
  54:	0f 6f c1             	movq   mm0,mm1
  57:	0f 6f d1             	movq   mm2,mm1
  5a:	0f 6f d9             	movq   mm3,mm1
  5d:	0f 6f e1             	movq   mm4,mm1
  60:	0f 6f e9             	movq   mm5,mm1
  63:	0f 6f f1             	movq   mm6,mm1
  66:	0f 6f f9             	movq   mm7,mm1
  69:	0f 6f c1             	movq   mm0,mm1
  6c:	0f 6f d1             	movq   mm2,mm1
  6f:	0f 6f d9             	movq   mm3,mm1
  72:	0f 6f e1             	movq   mm4,mm1
  75:	0f 6f e9             	movq   mm5,mm1
  78:	0f 6f f1             	movq   mm6,mm1
  7b:	0f 6f f9             	movq   mm7,mm1
  7e:	0f 6f c1             	movq   mm0,mm1
  81:	0f 6f d1             	movq   mm2,mm1
  84:	0f 6f d9             	movq   mm3,mm1
  87:	0f 6f e1             	movq   mm4,mm1
  8a:	0f 6f e9             	movq   mm5,mm1
  8d:	0f 6f f1             	movq   mm6,mm1
  90:	0f 6f f9             	movq   mm7,mm1
  93:	0f 6f c1             	movq   mm0,mm1
  96:	0f 6f d1             	movq   mm2,mm1
  99:	0f 6f d9             	movq   mm3,mm1
  9c:	0f 6f e1             	movq   mm4,mm1
  9f:	0f 6f e9             	movq   mm5,mm1
  a2:	0f 6f f1             	movq   mm6,mm1
  a5:	0f 6f f9             	movq   mm7,mm1
  a8:	0f 6f c1             	movq   mm0,mm1
  ab:	0f 6f d1             	movq   mm2,mm1
  ae:	0f 6f d9             	movq   mm3,mm1
  b1:	0f 6f e1             	movq   mm4,mm1
  b4:	0f 6f e9             	movq   mm5,mm1
  b7:	0f 6f f1             	movq   mm6,mm1
  ba:	0f 6f f9             	movq   mm7,mm1
  bd:	0f 6f c1             	movq   mm0,mm1
  c0:	0f 6f d1             	movq   mm2,mm1
  c3:	0f 6f d9             	movq   mm3,mm1
  c6:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM1, MM1;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 67.0
- Core cycles: 28.47
- Reference cycles: 28.8
- UOPS_PORT_5: 26.67
- UOPS_PORT_1: 25.13
- UOPS_PORT_0: 27.13

⇨ 3 μops that can only use ports {'0', '1', '5'}