SHLX (R64, M64, R64) - Port Usage (IACA 2.1)
With blocking instructions for ports {'0', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 5.50 Cycles Throughput Bottleneck: Port0, Port6
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 5.5 0.0 | 0.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 | 5.5 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r10w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r11w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r12w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol bx, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol cx, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol dx, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r10w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r11w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r12w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol bx, 0x0
| 2^ | 0.5 | | 0.5 0.5 | 0.5 0.5 | | | 0.5 | | CP | shlx r8, qword ptr [r14], r9
Total Num Of Uops: 12
⇨ One μop that can only use ports {'0', '6'}
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 5.50 Cycles Throughput Bottleneck: PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.5 0.0 | 0.0 | 5.5 5.5 | 5.5 5.5 | 0.0 | 0.0 | 0.5 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r10w, word ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r11w, word ptr [r14+0x42]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r12w, word ptr [r14+0x44]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov bx, word ptr [r14+0x46]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov cx, word ptr [r14+0x48]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov dx, word ptr [r14+0x4a]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r10w, word ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r11w, word ptr [r14+0x42]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r12w, word ptr [r14+0x44]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov bx, word ptr [r14+0x46]
| 2^ | 0.5 | | 0.5 0.5 | 0.5 0.5 | | | 0.5 | | CP | shlx r8, qword ptr [r14], r9
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}
With an indexed addressing mode
With blocking instructions for ports {'0', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 5.50 Cycles Throughput Bottleneck: Port0, Port6
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 5.5 0.0 | 0.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 | 5.5 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r10w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r11w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r12w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol bx, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol cx, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol dx, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r10w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r11w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol r12w, 0x0
| 1 | 0.5 | | | | | | 0.5 | | CP | rol bx, 0x0
| 2 | 0.5 | | 0.5 0.5 | 0.5 0.5 | | | 0.5 | | CP | shlx r8, qword ptr [r14+r13*1], r9
Total Num Of Uops: 12
⇨ One μop that can only use ports {'0', '6'}
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 5.50 Cycles Throughput Bottleneck: PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 0.5 0.0 | 0.0 | 5.5 5.5 | 5.5 5.5 | 0.0 | 0.0 | 0.5 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r10w, word ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r11w, word ptr [r14+0x42]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r12w, word ptr [r14+0x44]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov bx, word ptr [r14+0x46]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov cx, word ptr [r14+0x48]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov dx, word ptr [r14+0x4a]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r10w, word ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r11w, word ptr [r14+0x42]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov r12w, word ptr [r14+0x44]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | mov bx, word ptr [r14+0x46]
| 2 | 0.5 | | 0.5 0.5 | 0.5 0.5 | | | 0.5 | | CP | shlx r8, qword ptr [r14+r13*1], r9
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}