DIV (R32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c0          	movd   r8d,mm0
   4:	41 0f 7e c1          	movd   r9d,mm0
   8:	41 0f 7e c2          	movd   r10d,mm0
   c:	41 0f 7e c3          	movd   r11d,mm0
  10:	41 0f 7e c4          	movd   r12d,mm0
  14:	0f 7e c1             	movd   ecx,mm0
  17:	41 0f 7e c0          	movd   r8d,mm0
  1b:	41 0f 7e c1          	movd   r9d,mm0
  1f:	41 0f 7e c2          	movd   r10d,mm0
  23:	41 0f 7e c3          	movd   r11d,mm0
  27:	41 0f 7e c4          	movd   r12d,mm0
  2b:	0f 7e c1             	movd   ecx,mm0
  2e:	41 0f 7e c0          	movd   r8d,mm0
  32:	41 0f 7e c1          	movd   r9d,mm0
  36:	41 0f 7e c2          	movd   r10d,mm0
  3a:	41 0f 7e c3          	movd   r11d,mm0
  3e:	41 0f 7e c4          	movd   r12d,mm0
  42:	0f 7e c1             	movd   ecx,mm0
  45:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  4c:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  53:	f7 f3                	div    ebx

Init:

PXOR MM0, MM0;
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0

Show nanoBench command
Results:
- Instructions retired: 21.0
- Core cycles: 20.13
- Reference cycles: 18.04
- UOPS_PORT_0: 19.98

⇨ 2 μops that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  30:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  35:	66 0f 58 c1          	addpd  xmm0,xmm1
  39:	66 0f 58 d1          	addpd  xmm2,xmm1
  3d:	66 0f 58 d9          	addpd  xmm3,xmm1
  41:	66 0f 58 e1          	addpd  xmm4,xmm1
  45:	66 0f 58 e9          	addpd  xmm5,xmm1
  49:	66 0f 58 f1          	addpd  xmm6,xmm1
  4d:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  54:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  5b:	f7 f3                	div    ebx

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0

Show nanoBench command
Results:
- Instructions retired: 21.0
- Core cycles: 20.35
- Reference cycles: 18.04
- UOPS_PORT_1: 20.0

⇨ 2 μops that can only use port '1'

With blocking instructions for port '5':

Code:

   0:	66 0f 38 de c1       	aesdec xmm0,xmm1
   5:	66 0f 38 de d1       	aesdec xmm2,xmm1
   a:	66 0f 38 de d9       	aesdec xmm3,xmm1
   f:	66 0f 38 de e1       	aesdec xmm4,xmm1
  14:	66 0f 38 de e9       	aesdec xmm5,xmm1
  19:	66 0f 38 de f1       	aesdec xmm6,xmm1
  1e:	66 0f 38 de f9       	aesdec xmm7,xmm1
  23:	66 44 0f 38 de c1    	aesdec xmm8,xmm1
  29:	66 44 0f 38 de c9    	aesdec xmm9,xmm1
  2f:	66 44 0f 38 de d1    	aesdec xmm10,xmm1
  35:	66 44 0f 38 de d9    	aesdec xmm11,xmm1
  3b:	66 44 0f 38 de e1    	aesdec xmm12,xmm1
  41:	66 0f 38 de c1       	aesdec xmm0,xmm1
  46:	66 0f 38 de d1       	aesdec xmm2,xmm1
  4b:	66 0f 38 de d9       	aesdec xmm3,xmm1
  50:	66 0f 38 de e1       	aesdec xmm4,xmm1
  55:	66 0f 38 de e9       	aesdec xmm5,xmm1
  5a:	66 0f 38 de f1       	aesdec xmm6,xmm1
  5f:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  66:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  6d:	f7 f3                	div    ebx

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0

Show nanoBench command
Results:
- Instructions retired: 21.0
- Core cycles: 21.27
- Reference cycles: 19.1
- UOPS_PORT_5: 20.01

⇨ 2 μops that can only use port '5'

With blocking instructions for ports {'0', '1'}:

Code:

   0:	66 0f 59 c1          	mulpd  xmm0,xmm1
   4:	66 0f 59 d1          	mulpd  xmm2,xmm1
   8:	66 0f 59 d9          	mulpd  xmm3,xmm1
   c:	66 0f 59 e1          	mulpd  xmm4,xmm1
  10:	66 0f 59 e9          	mulpd  xmm5,xmm1
  14:	66 0f 59 f1          	mulpd  xmm6,xmm1
  18:	66 0f 59 f9          	mulpd  xmm7,xmm1
  1c:	66 44 0f 59 c1       	mulpd  xmm8,xmm1
  21:	66 44 0f 59 c9       	mulpd  xmm9,xmm1
  26:	66 44 0f 59 d1       	mulpd  xmm10,xmm1
  2b:	66 44 0f 59 d9       	mulpd  xmm11,xmm1
  30:	66 44 0f 59 e1       	mulpd  xmm12,xmm1
  35:	66 0f 59 c1          	mulpd  xmm0,xmm1
  39:	66 0f 59 d1          	mulpd  xmm2,xmm1
  3d:	66 0f 59 d9          	mulpd  xmm3,xmm1
  41:	66 0f 59 e1          	mulpd  xmm4,xmm1
  45:	66 0f 59 e9          	mulpd  xmm5,xmm1
  49:	66 0f 59 f1          	mulpd  xmm6,xmm1
  4d:	66 0f 59 f9          	mulpd  xmm7,xmm1
  51:	66 44 0f 59 c1       	mulpd  xmm8,xmm1
  56:	66 44 0f 59 c9       	mulpd  xmm9,xmm1
  5b:	66 44 0f 59 d1       	mulpd  xmm10,xmm1
  60:	66 44 0f 59 d9       	mulpd  xmm11,xmm1
  65:	66 44 0f 59 e1       	mulpd  xmm12,xmm1
  6a:	66 0f 59 c1          	mulpd  xmm0,xmm1
  6e:	66 0f 59 d1          	mulpd  xmm2,xmm1
  72:	66 0f 59 d9          	mulpd  xmm3,xmm1
  76:	66 0f 59 e1          	mulpd  xmm4,xmm1
  7a:	66 0f 59 e9          	mulpd  xmm5,xmm1
  7e:	66 0f 59 f1          	mulpd  xmm6,xmm1
  82:	66 0f 59 f9          	mulpd  xmm7,xmm1
  86:	66 44 0f 59 c1       	mulpd  xmm8,xmm1
  8b:	66 44 0f 59 c9       	mulpd  xmm9,xmm1
  90:	66 44 0f 59 d1       	mulpd  xmm10,xmm1
  95:	66 44 0f 59 d9       	mulpd  xmm11,xmm1
  9a:	66 44 0f 59 e1       	mulpd  xmm12,xmm1
  9f:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  a6:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  ad:	f7 f3                	div    ebx

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0

Show nanoBench command
Results:
- Instructions retired: 39.0
- Core cycles: 27.19
- Reference cycles: 24.49
- UOPS_PORT_1: 20.43
- UOPS_PORT_0: 19.53

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c0 00       	rol    r8w,0x0
   5:	66 41 c1 c1 00       	rol    r9w,0x0
   a:	66 41 c1 c2 00       	rol    r10w,0x0
   f:	66 41 c1 c3 00       	rol    r11w,0x0
  14:	66 41 c1 c4 00       	rol    r12w,0x0
  19:	66 c1 c1 00          	rol    cx,0x0
  1d:	66 41 c1 c0 00       	rol    r8w,0x0
  22:	66 41 c1 c1 00       	rol    r9w,0x0
  27:	66 41 c1 c2 00       	rol    r10w,0x0
  2c:	66 41 c1 c3 00       	rol    r11w,0x0
  31:	66 41 c1 c4 00       	rol    r12w,0x0
  36:	66 c1 c1 00          	rol    cx,0x0
  3a:	66 41 c1 c0 00       	rol    r8w,0x0
  3f:	66 41 c1 c1 00       	rol    r9w,0x0
  44:	66 41 c1 c2 00       	rol    r10w,0x0
  49:	66 41 c1 c3 00       	rol    r11w,0x0
  4e:	66 41 c1 c4 00       	rol    r12w,0x0
  53:	66 c1 c1 00          	rol    cx,0x0
  57:	66 41 c1 c0 00       	rol    r8w,0x0
  5c:	66 41 c1 c1 00       	rol    r9w,0x0
  61:	66 41 c1 c2 00       	rol    r10w,0x0
  66:	66 41 c1 c3 00       	rol    r11w,0x0
  6b:	66 41 c1 c4 00       	rol    r12w,0x0
  70:	66 c1 c1 00          	rol    cx,0x0
  74:	66 41 c1 c0 00       	rol    r8w,0x0
  79:	66 41 c1 c1 00       	rol    r9w,0x0
  7e:	66 41 c1 c2 00       	rol    r10w,0x0
  83:	66 41 c1 c3 00       	rol    r11w,0x0
  88:	66 41 c1 c4 00       	rol    r12w,0x0
  8d:	66 c1 c1 00          	rol    cx,0x0
  91:	66 41 c1 c0 00       	rol    r8w,0x0
  96:	66 41 c1 c1 00       	rol    r9w,0x0
  9b:	66 41 c1 c2 00       	rol    r10w,0x0
  a0:	66 41 c1 c3 00       	rol    r11w,0x0
  a5:	66 41 c1 c4 00       	rol    r12w,0x0
  aa:	66 c1 c1 00          	rol    cx,0x0
  ae:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  b5:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  bc:	f7 f3                	div    ebx

Init:
```
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 39.0
- Core cycles: 20.89
- Reference cycles: 18.96
- UOPS_PORT_6: 20.07
- UOPS_PORT_0: 19.89

⇨ 2 μops that can only use ports {'0', '6'}

With blocking instructions for ports {'1', '5'}:

Code:

   0:	45 8d 06             	lea    r8d,[r14]
   3:	45 8d 0e             	lea    r9d,[r14]
   6:	45 8d 16             	lea    r10d,[r14]
   9:	45 8d 1e             	lea    r11d,[r14]
   c:	45 8d 26             	lea    r12d,[r14]
   f:	41 8d 0e             	lea    ecx,[r14]
  12:	45 8d 06             	lea    r8d,[r14]
  15:	45 8d 0e             	lea    r9d,[r14]
  18:	45 8d 16             	lea    r10d,[r14]
  1b:	45 8d 1e             	lea    r11d,[r14]
  1e:	45 8d 26             	lea    r12d,[r14]
  21:	41 8d 0e             	lea    ecx,[r14]
  24:	45 8d 06             	lea    r8d,[r14]
  27:	45 8d 0e             	lea    r9d,[r14]
  2a:	45 8d 16             	lea    r10d,[r14]
  2d:	45 8d 1e             	lea    r11d,[r14]
  30:	45 8d 26             	lea    r12d,[r14]
  33:	41 8d 0e             	lea    ecx,[r14]
  36:	45 8d 06             	lea    r8d,[r14]
  39:	45 8d 0e             	lea    r9d,[r14]
  3c:	45 8d 16             	lea    r10d,[r14]
  3f:	45 8d 1e             	lea    r11d,[r14]
  42:	45 8d 26             	lea    r12d,[r14]
  45:	41 8d 0e             	lea    ecx,[r14]
  48:	45 8d 06             	lea    r8d,[r14]
  4b:	45 8d 0e             	lea    r9d,[r14]
  4e:	45 8d 16             	lea    r10d,[r14]
  51:	45 8d 1e             	lea    r11d,[r14]
  54:	45 8d 26             	lea    r12d,[r14]
  57:	41 8d 0e             	lea    ecx,[r14]
  5a:	45 8d 06             	lea    r8d,[r14]
  5d:	45 8d 0e             	lea    r9d,[r14]
  60:	45 8d 16             	lea    r10d,[r14]
  63:	45 8d 1e             	lea    r11d,[r14]
  66:	45 8d 26             	lea    r12d,[r14]
  69:	41 8d 0e             	lea    ecx,[r14]
  6c:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  73:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  7a:	f7 f3                	div    ebx

Init:
```
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 39.0
- Core cycles: 21.85
- Reference cycles: 19.56
- UOPS_PORT_5: 19.96
- UOPS_PORT_1: 21.0

⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	f3 0f d6 c0          	movq2dq xmm0,mm0
   4:	f3 0f d6 c8          	movq2dq xmm1,mm0
   8:	f3 0f d6 d0          	movq2dq xmm2,mm0
   c:	f3 0f d6 d8          	movq2dq xmm3,mm0
  10:	f3 0f d6 e0          	movq2dq xmm4,mm0
  14:	f3 0f d6 e8          	movq2dq xmm5,mm0
  18:	f3 0f d6 f0          	movq2dq xmm6,mm0
  1c:	f3 0f d6 f8          	movq2dq xmm7,mm0
  20:	f3 44 0f d6 c0       	movq2dq xmm8,mm0
  25:	f3 44 0f d6 c8       	movq2dq xmm9,mm0
  2a:	f3 44 0f d6 d0       	movq2dq xmm10,mm0
  2f:	f3 44 0f d6 d8       	movq2dq xmm11,mm0
  34:	f3 44 0f d6 e0       	movq2dq xmm12,mm0
  39:	f3 0f d6 c0          	movq2dq xmm0,mm0
  3d:	f3 0f d6 c8          	movq2dq xmm1,mm0
  41:	f3 0f d6 d0          	movq2dq xmm2,mm0
  45:	f3 0f d6 d8          	movq2dq xmm3,mm0
  49:	f3 0f d6 e0          	movq2dq xmm4,mm0
  4d:	f3 0f d6 e8          	movq2dq xmm5,mm0
  51:	f3 0f d6 f0          	movq2dq xmm6,mm0
  55:	f3 0f d6 f8          	movq2dq xmm7,mm0
  59:	f3 44 0f d6 c0       	movq2dq xmm8,mm0
  5e:	f3 44 0f d6 c8       	movq2dq xmm9,mm0
  63:	f3 44 0f d6 d0       	movq2dq xmm10,mm0
  68:	f3 44 0f d6 d8       	movq2dq xmm11,mm0
  6d:	f3 44 0f d6 e0       	movq2dq xmm12,mm0
  72:	f3 0f d6 c0          	movq2dq xmm0,mm0
  76:	f3 0f d6 c8          	movq2dq xmm1,mm0
  7a:	f3 0f d6 d0          	movq2dq xmm2,mm0
  7e:	f3 0f d6 d8          	movq2dq xmm3,mm0
  82:	f3 0f d6 e0          	movq2dq xmm4,mm0
  86:	f3 0f d6 e8          	movq2dq xmm5,mm0
  8a:	f3 0f d6 f0          	movq2dq xmm6,mm0
  8e:	f3 0f d6 f8          	movq2dq xmm7,mm0
  92:	f3 44 0f d6 c0       	movq2dq xmm8,mm0
  97:	f3 44 0f d6 c8       	movq2dq xmm9,mm0
  9c:	f3 44 0f d6 d0       	movq2dq xmm10,mm0
  a1:	f3 44 0f d6 d8       	movq2dq xmm11,mm0
  a6:	f3 44 0f d6 e0       	movq2dq xmm12,mm0
  ab:	f3 0f d6 c0          	movq2dq xmm0,mm0
  af:	f3 0f d6 c8          	movq2dq xmm1,mm0
  b3:	f3 0f d6 d0          	movq2dq xmm2,mm0
  b7:	f3 0f d6 d8          	movq2dq xmm3,mm0
  bb:	f3 0f d6 e0          	movq2dq xmm4,mm0
  bf:	f3 0f d6 e8          	movq2dq xmm5,mm0
  c3:	f3 0f d6 f0          	movq2dq xmm6,mm0
  c7:	f3 0f d6 f8          	movq2dq xmm7,mm0
  cb:	f3 44 0f d6 c0       	movq2dq xmm8,mm0
  d0:	f3 44 0f d6 c8       	movq2dq xmm9,mm0
  d5:	f3 44 0f d6 d0       	movq2dq xmm10,mm0
  da:	f3 44 0f d6 d8       	movq2dq xmm11,mm0
  df:	f3 44 0f d6 e0       	movq2dq xmm12,mm0
  e4:	f3 0f d6 c0          	movq2dq xmm0,mm0
  e8:	f3 0f d6 c8          	movq2dq xmm1,mm0
  ec:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  f3:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  fa:	f7 f3                	div    ebx

Init:

VZEROALL;
PXOR MM0, MM0;
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0

Show nanoBench command
Results:
- Instructions retired: 57.0
- Core cycles: 24.22
- Reference cycles: 21.63
- UOPS_PORT_5: 20.89
- UOPS_PORT_1: 19.83
- UOPS_PORT_0: 20.22

With blocking instructions for ports {'0', '1', '5', '6'}:

Code:

   0:	45 0f bf c1          	movsx  r8d,r9w
   4:	45 0f bf d1          	movsx  r10d,r9w
   8:	45 0f bf d9          	movsx  r11d,r9w
   c:	45 0f bf e1          	movsx  r12d,r9w
  10:	41 0f bf c9          	movsx  ecx,r9w
  14:	45 0f bf c1          	movsx  r8d,r9w
  18:	45 0f bf d1          	movsx  r10d,r9w
  1c:	45 0f bf d9          	movsx  r11d,r9w
  20:	45 0f bf e1          	movsx  r12d,r9w
  24:	41 0f bf c9          	movsx  ecx,r9w
  28:	45 0f bf c1          	movsx  r8d,r9w
  2c:	45 0f bf d1          	movsx  r10d,r9w
  30:	45 0f bf d9          	movsx  r11d,r9w
  34:	45 0f bf e1          	movsx  r12d,r9w
  38:	41 0f bf c9          	movsx  ecx,r9w
  3c:	45 0f bf c1          	movsx  r8d,r9w
  40:	45 0f bf d1          	movsx  r10d,r9w
  44:	45 0f bf d9          	movsx  r11d,r9w
  48:	45 0f bf e1          	movsx  r12d,r9w
  4c:	41 0f bf c9          	movsx  ecx,r9w
  50:	45 0f bf c1          	movsx  r8d,r9w
  54:	45 0f bf d1          	movsx  r10d,r9w
  58:	45 0f bf d9          	movsx  r11d,r9w
  5c:	45 0f bf e1          	movsx  r12d,r9w
  60:	41 0f bf c9          	movsx  ecx,r9w
  64:	45 0f bf c1          	movsx  r8d,r9w
  68:	45 0f bf d1          	movsx  r10d,r9w
  6c:	45 0f bf d9          	movsx  r11d,r9w
  70:	45 0f bf e1          	movsx  r12d,r9w
  74:	41 0f bf c9          	movsx  ecx,r9w
  78:	45 0f bf c1          	movsx  r8d,r9w
  7c:	45 0f bf d1          	movsx  r10d,r9w
  80:	45 0f bf d9          	movsx  r11d,r9w
  84:	45 0f bf e1          	movsx  r12d,r9w
  88:	41 0f bf c9          	movsx  ecx,r9w
  8c:	45 0f bf c1          	movsx  r8d,r9w
  90:	45 0f bf d1          	movsx  r10d,r9w
  94:	45 0f bf d9          	movsx  r11d,r9w
  98:	45 0f bf e1          	movsx  r12d,r9w
  9c:	41 0f bf c9          	movsx  ecx,r9w
  a0:	45 0f bf c1          	movsx  r8d,r9w
  a4:	45 0f bf d1          	movsx  r10d,r9w
  a8:	45 0f bf d9          	movsx  r11d,r9w
  ac:	45 0f bf e1          	movsx  r12d,r9w
  b0:	41 0f bf c9          	movsx  ecx,r9w
  b4:	45 0f bf c1          	movsx  r8d,r9w
  b8:	45 0f bf d1          	movsx  r10d,r9w
  bc:	45 0f bf d9          	movsx  r11d,r9w
  c0:	45 0f bf e1          	movsx  r12d,r9w
  c4:	41 0f bf c9          	movsx  ecx,r9w
  c8:	45 0f bf c1          	movsx  r8d,r9w
  cc:	45 0f bf d1          	movsx  r10d,r9w
  d0:	45 0f bf d9          	movsx  r11d,r9w
  d4:	45 0f bf e1          	movsx  r12d,r9w
  d8:	41 0f bf c9          	movsx  ecx,r9w
  dc:	45 0f bf c1          	movsx  r8d,r9w
  e0:	45 0f bf d1          	movsx  r10d,r9w
  e4:	45 0f bf d9          	movsx  r11d,r9w
  e8:	45 0f bf e1          	movsx  r12d,r9w
  ec:	41 0f bf c9          	movsx  ecx,r9w
  f0:	45 0f bf c1          	movsx  r8d,r9w
  f4:	45 0f bf d1          	movsx  r10d,r9w
  f8:	45 0f bf d9          	movsx  r11d,r9w
  fc:	45 0f bf e1          	movsx  r12d,r9w
 100:	41 0f bf c9          	movsx  ecx,r9w
 104:	45 0f bf c1          	movsx  r8d,r9w
 108:	45 0f bf d1          	movsx  r10d,r9w
 10c:	45 0f bf d9          	movsx  r11d,r9w
 110:	45 0f bf e1          	movsx  r12d,r9w
 114:	41 0f bf c9          	movsx  ecx,r9w
 118:	45 0f bf c1          	movsx  r8d,r9w
 11c:	45 0f bf d1          	movsx  r10d,r9w
 120:	48 c7 c0 00 00 00 00 	mov    rax,0x0
 127:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
 12e:	f7 f3                	div    ebx

Init:
```
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 75.0
- Core cycles: 28.15
- Reference cycles: 25.03
- UOPS_PORT_6: 22.08
- UOPS_PORT_5: 22.69
- UOPS_PORT_1: 21.38
- UOPS_PORT_0: 17.85

⇨ One μop that can only use ports {'0', '1', '5', '6'}