CMOVB (R32, R32) - Port Usage

With blocking instructions for ports {'0', '1'}:

Code:

   0:	66 0f 59 c1          	mulpd  xmm0,xmm1
   4:	66 0f 59 d1          	mulpd  xmm2,xmm1
   8:	66 0f 59 d9          	mulpd  xmm3,xmm1
   c:	66 0f 59 e1          	mulpd  xmm4,xmm1
  10:	66 0f 59 e9          	mulpd  xmm5,xmm1
  14:	66 0f 59 f1          	mulpd  xmm6,xmm1
  18:	66 0f 59 f9          	mulpd  xmm7,xmm1
  1c:	66 44 0f 59 c1       	mulpd  xmm8,xmm1
  21:	66 44 0f 59 c9       	mulpd  xmm9,xmm1
  26:	66 44 0f 59 d1       	mulpd  xmm10,xmm1
  2b:	45 0f 42 c1          	cmovb  r8d,r9d

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.09
- Reference cycles: 4.59
- UOPS_PORT_1: 5.0
- UOPS_PORT_0: 5.0

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c2 00       	rol    r10w,0x0
   5:	66 41 c1 c3 00       	rol    r11w,0x0
   a:	66 41 c1 c4 00       	rol    r12w,0x0
   f:	66 c1 c3 00          	rol    bx,0x0
  13:	66 c1 c1 00          	rol    cx,0x0
  17:	66 c1 c2 00          	rol    dx,0x0
  1b:	66 41 c1 c2 00       	rol    r10w,0x0
  20:	66 41 c1 c3 00       	rol    r11w,0x0
  25:	66 41 c1 c4 00       	rol    r12w,0x0
  2a:	66 c1 c3 00          	rol    bx,0x0
  2e:	45 0f 42 c1          	cmovb  r8d,r9d

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.55
- Reference cycles: 4.96
- UOPS_PORT_6: 5.48
- UOPS_PORT_0: 5.51

⇨ One μop that can only use ports {'0', '6'}

With blocking instructions for ports {'1', '5'}:

Code:

   0:	45 8d 16             	lea    r10d,[r14]
   3:	45 8d 1e             	lea    r11d,[r14]
   6:	45 8d 26             	lea    r12d,[r14]
   9:	41 8d 1e             	lea    ebx,[r14]
   c:	41 8d 0e             	lea    ecx,[r14]
   f:	41 8d 16             	lea    edx,[r14]
  12:	45 8d 16             	lea    r10d,[r14]
  15:	45 8d 1e             	lea    r11d,[r14]
  18:	45 8d 26             	lea    r12d,[r14]
  1b:	41 8d 1e             	lea    ebx,[r14]
  1e:	45 0f 42 c1          	cmovb  r8d,r9d

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.05
- Reference cycles: 4.48
- UOPS_PORT_5: 4.99
- UOPS_PORT_1: 5.0

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	f3 0f d6 c0          	movq2dq xmm0,mm0
   4:	f3 0f d6 c8          	movq2dq xmm1,mm0
   8:	f3 0f d6 d0          	movq2dq xmm2,mm0
   c:	f3 0f d6 d8          	movq2dq xmm3,mm0
  10:	f3 0f d6 e0          	movq2dq xmm4,mm0
  14:	f3 0f d6 e8          	movq2dq xmm5,mm0
  18:	f3 0f d6 f0          	movq2dq xmm6,mm0
  1c:	f3 0f d6 f8          	movq2dq xmm7,mm0
  20:	f3 44 0f d6 c0       	movq2dq xmm8,mm0
  25:	f3 44 0f d6 c8       	movq2dq xmm9,mm0
  2a:	45 0f 42 c1          	cmovb  r8d,r9d

Init:
```
VZEROALL;
PXOR MM0, MM0
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 3.4
- Reference cycles: 2.99
- UOPS_PORT_5: 3.33
- UOPS_PORT_1: 3.33
- UOPS_PORT_0: 3.35

With blocking instructions for ports {'0', '1', '5', '6'}:

Code:

   0:	45 0f bf d3          	movsx  r10d,r11w
   4:	45 0f bf e3          	movsx  r12d,r11w
   8:	41 0f bf db          	movsx  ebx,r11w
   c:	41 0f bf cb          	movsx  ecx,r11w
  10:	41 0f bf d3          	movsx  edx,r11w
  14:	45 0f bf d3          	movsx  r10d,r11w
  18:	45 0f bf e3          	movsx  r12d,r11w
  1c:	41 0f bf db          	movsx  ebx,r11w
  20:	41 0f bf cb          	movsx  ecx,r11w
  24:	41 0f bf d3          	movsx  edx,r11w
  28:	45 0f 42 c1          	cmovb  r8d,r9d

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 3.08
- Reference cycles: 2.77
- UOPS_PORT_6: 3.01
- UOPS_PORT_5: 3.01
- UOPS_PORT_1: 3.0
- UOPS_PORT_0: 2.98

⇨ One μop that can only use ports {'0', '1', '5', '6'}